Węgrzyn, M., Voytusik, S., & Gavkalova, N. (2025). FPGA-based Low Latency Square Root CORDIC Algorithm. Journal of Telecommunications and Information Technology, 99(1), 21-29. https://doi.org/10.26636/jtit.2025.1.1950
Citace podle Chicago (17th ed.)Węgrzyn, Mariusz, Stepan Voytusik, a Nataliia Gavkalova. "FPGA-based Low Latency Square Root CORDIC Algorithm." Journal of Telecommunications and Information Technology 99, no. 1 (2025): 21-29. https://doi.org/10.26636/jtit.2025.1.1950.
Citace podle MLA (9th ed.)Węgrzyn, Mariusz, et al. "FPGA-based Low Latency Square Root CORDIC Algorithm." Journal of Telecommunications and Information Technology, vol. 99, no. 1, 2025, pp. 21-29, https://doi.org/10.26636/jtit.2025.1.1950.
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