Zhao, Q., Liu, Q., Zhang, X., Hao, L., Li, X., Zhang, S., . . . Wu, X. (2025). A High-Performance and High-Robustness Triple-Node-Upset Tolerant Latch Based on Redundant-Node Hardening. IEEE transactions on very large scale integration (VLSI) systems, 33(5), 1373-1383. https://doi.org/10.1109/TVLSI.2025.3535926
Citace podle Chicago (17th ed.)Zhao, Qiang, Qingyi Liu, Xinyi Zhang, Licai Hao, Xin Li, Shengyue Zhang, Chunyu Peng, Zhiting Lin, a Xiulong Wu. "A High-Performance and High-Robustness Triple-Node-Upset Tolerant Latch Based on Redundant-Node Hardening." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 33, no. 5 (2025): 1373-1383. https://doi.org/10.1109/TVLSI.2025.3535926.
Citace podle MLA (9th ed.)Zhao, Qiang, et al. "A High-Performance and High-Robustness Triple-Node-Upset Tolerant Latch Based on Redundant-Node Hardening." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 5, 2025, pp. 1373-1383, https://doi.org/10.1109/TVLSI.2025.3535926.