Parallel field programmable gate array implementation of the sum of absolute differences algorithm used in the stereoscopic system
The key element of the stereoscopic system is based on the sum of absolute differences (SAD) algorithm, which is the most repeated operation in the stereo matching subsystem; however, this algorithm requires a very intensive processing time, statistical analysis show that the SAD block can consume m...
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| Veröffentlicht in: | Telkomnika Jg. 20; H. 6; S. 1307 - 1316 |
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| Hauptverfasser: | , , , |
| Format: | Journal Article |
| Sprache: | Englisch |
| Veröffentlicht: |
Yogyakarta
Ahmad Dahlan University
01.12.2022
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| ISSN: | 1693-6930, 2302-9293 |
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| Abstract | The key element of the stereoscopic system is based on the sum of absolute differences (SAD) algorithm, which is the most repeated operation in the stereo matching subsystem; however, this algorithm requires a very intensive processing time, statistical analysis show that the SAD block can consume more than 80% of the overall processing time of the algorithm. In this paper we propose a highly efficient hardware architecture of the SAD algorithm for real time stereo matching, the proposed architecture is established by a hierarchical parallel architecture of the SAD block, and verified by simulation and successfully implemented in Cyclone IV field programmable gate array (FPGA), it provides a significant reduction of processing time and the performance of the stereo imaging system is able to achieve 30 frames per second of 640x480 resolution color images. [...]the semi global algorithm incorporates the advantages of both local and global algorithms by achieving relatively low complexity. The mathematical operations must be performed efficiently to be used in real time stereo vision systems. [...]our work proposes to use a simple and fast architecture for disparity calculation, which is based on a SAD algorithm. |
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| AbstractList | The key element of the stereoscopic system is based on the sum of absolute differences (SAD) algorithm, which is the most repeated operation in the stereo matching subsystem; however, this algorithm requires a very intensive processing time, statistical analysis show that the SAD block can consume more than 80% of the overall processing time of the algorithm. In this paper we propose a highly efficient hardware architecture of the SAD algorithm for real time stereo matching, the proposed architecture is established by a hierarchical parallel architecture of the SAD block, and verified by simulation and successfully implemented in Cyclone IV field programmable gate array (FPGA), it provides a significant reduction of processing time and the performance of the stereo imaging system is able to achieve 30 frames per second of 640x480 resolution color images. [...]the semi global algorithm incorporates the advantages of both local and global algorithms by achieving relatively low complexity. The mathematical operations must be performed efficiently to be used in real time stereo vision systems. [...]our work proposes to use a simple and fast architecture for disparity calculation, which is based on a SAD algorithm. |
| Author | Sejai, Mohamed Mansouri, Anass Dosse, Saad Bennani Ruichek, Yassine |
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| Copyright | 2022. This work is published under https://creativecommons.org/licenses/by/3.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License. |
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| DOI | 10.12928/telkomnika.v20i6.22852 |
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| SubjectTerms | Algorithms Cameras Color imagery Dynamic programming Field programmable gate arrays Frames per second Matching Optimization Real time Software Statistical analysis Stereoscopy Subsystems Vision systems |
| Title | Parallel field programmable gate array implementation of the sum of absolute differences algorithm used in the stereoscopic system |
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