Single Event Transient Characterization of a Low-Dropout Regulator in a Sub-20 nm CMOS Technology

In this article, the mechanism of single event transient (SET) of a low-dropout (LDO) regulator fabricated in a sub-20 nm fin-field effect transistor (FinFET) technology was studied. Simulation program with integrated circuit emphasis (SPICE) circuit simulation finds that the most sensitive nodes ar...

Celý popis

Uložené v:

Podrobná bibliografia
Vydané v:	IEEE transactions on nuclear science Ročník 72; číslo 10; s. 3351 - 3363
Hlavní autori:	Wang, Xun, Chen, Jianjun, Liang, Bin, Wen, Yi, Shen, Fan, Chi, Yaqing, Luo, Deng, Yu, Guofang
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.10.2025 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Circuit simulation Confidence intervals Field effect transistors FinFETs Heavy ion experiment Heavy ions Hypothesis testing Integrated circuits Ions Logic gates low-dropout (LDO) regulator Power consumption Pulse amplitude Pulse duration Radiation hardening Regulation Regulators Reinforcement Semiconductor devices Simulation simulation program with integrated circuit emphasis (SPICE) circuit simulation single event transient (SET) SPICE Statistical analysis sub-20 nm fin-field effect transistor (FinFET) process Transistors Voltage control
ISSN:	0018-9499, 1558-1578
On-line prístup:	Získať plný text
Tagy:	Pridať tag Žiadne tagy, Buďte prvý, kto otaguje tento záznam!

Buďte prvý, kto okomentuje tento záznam!