MTOF: A Novel FPGA-Based EMT Toolbox in MATLAB

Field programmable gate array (FPGA) is becoming an attractive solution for real-time electromagnetic transient (EMT) simulations. FPGA-based EMT simulation uses thousands of lines of code and sophisticated architecture to satisfy executable requirements ranging from the low-level analog signal to t...

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Bibliographic Details
Published in:IEEE transactions on power systems Vol. 40; no. 5; pp. 3736 - 3749
Main Authors: Ma, Xin, Zhang, Xiao-Ping
Format: Journal Article
Language:English
Published: New York IEEE 01.09.2025
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Accuracy
Codes
Coding
data format
Electromagnetic transients simulations
Field programmable gate arrays
Floating point arithmetic
floating-point
FPGA
Hardware
History
Mathematical models
MATLAB
Modeling
Real time
real-time simulations
Real-time systems
Resource utilization
toolbox
VHDL
ISSN:0885-8950, 1558-0679
Online Access:Get full text
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Summary:Field programmable gate array (FPGA) is becoming an attractive solution for real-time electromagnetic transient (EMT) simulations. FPGA-based EMT simulation uses thousands of lines of code and sophisticated architecture to satisfy executable requirements ranging from the low-level analog signal to the advanced EMT mathematics. The coding would place a tremendous burden on beginners to take at least 6 months. To provide more straightforward solutions, this paper develops the MATLAB-to-FPGA EMT toolbox (MTOF) in the computational engine frame of MATLAB. Based on Input Data, MTOF under a user-friendly MATLAB environment can generate transparent FPGA-based code while complex programming under FPGA can be avoided. This brings a dramatic coding simplification and results in significant savings of programming time. MTOF includes automatic calculation sequence, resource utilization, and initialization. For high accuracy, MTOF performs the Floating-Point arithmetic of EMT models with more readable data formats (e.g., memory unit) on FPGA. To improve computational efficiency, ready-to-run architecture is presented to automate code generation quickly. MTOF can generate FPGA code files within 50 s and 300 s for the 4-machine 11-bus and 10-machine 39-bus systems, respectively. To verify the effectiveness of the generated FPGA code generated by MTOF, simulations are demonstrated on the two systems using a single FPGA board with high accuracy.
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ISSN:0885-8950
1558-0679
DOI:10.1109/TPWRS.2025.3535841