Zhang, H., Qiao, X., Tian, J., Song, S., & Wang, Z. (2025). Fast Hardware Architecture With Efficient Matrix Computations for the Key Generation of Classic McEliece. IEEE transactions on circuits and systems. I, Regular papers, 72(3), 1321-1331. https://doi.org/10.1109/TCSI.2025.3528119
Citácia podle Chicago (17th ed.)Zhang, Haochen, Xinyuan Qiao, Jing Tian, Suwen Song, a Zhongfeng Wang. "Fast Hardware Architecture With Efficient Matrix Computations for the Key Generation of Classic McEliece." IEEE Transactions on Circuits and Systems. I, Regular Papers 72, no. 3 (2025): 1321-1331. https://doi.org/10.1109/TCSI.2025.3528119.
Citácia podľa MLA (8th ed.)Zhang, Haochen, et al. "Fast Hardware Architecture With Efficient Matrix Computations for the Key Generation of Classic McEliece." IEEE Transactions on Circuits and Systems. I, Regular Papers, vol. 72, no. 3, 2025, pp. 1321-1331, https://doi.org/10.1109/TCSI.2025.3528119.