Optimizing modulo scheduling to achieve reuse and concurrency for stream processors

Both reuse and concurrency are performance-critical for stream processors. When applying loop unrolling and software pipelining separately to stream-level loops, either reuse or concurrency or both may be inadequately exploited. In this paper, we optimize modulo scheduling to maximize stream reuse a...

Full description

Bibliographic Details

Published in:	The Journal of supercomputing Vol. 59; no. 3; pp. 1229 - 1251
Main Authors:	Wang, Li, Xue, Jingling, Yang, Xuejun
Format:	Journal Article
Language:	English
Published:	Boston Springer US 01.03.2012
Subjects:	Compilers Computer Science Interpreters Processor Architectures Programming Languages Stream register file Stream programming model Stream processor Software pipelining Loop unrolling
ISSN:	0920-8542, 1573-0484
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!