Citáce podľa APA (7th ed.)

WEY, C., & HUANG, W. (1999). Redesignability check for analog circuits with incomplete implementation information. IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 46(8), 939-949. https://doi.org/10.1109/81.780375

Citácia podle Chicago (17th ed.)

WEY, C.-L, a W.-H HUANG. "Redesignability Check for Analog Circuits with Incomplete Implementation Information." IEEE Transactions on Circuits and Systems. 1, Fundamental Theory and Applications 46, no. 8 (1999): 939-949. https://doi.org/10.1109/81.780375.

Citácia podľa MLA (8th ed.)

WEY, C.-L, a W.-H HUANG. "Redesignability Check for Analog Circuits with Incomplete Implementation Information." IEEE Transactions on Circuits and Systems. 1, Fundamental Theory and Applications, vol. 46, no. 8, 1999, pp. 939-949, https://doi.org/10.1109/81.780375.

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