Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq-7000 FPGA

This paper presents a novel approach for fast FPGA prototyping of the Canny edge detection algorithm using High-Level Synthesis (HLS) based on the HDL Coder. Traditional RTL-based design methodologies for implementing image processing algorithms on FPGAs can be time-consuming and error-prone. HLS of...

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Bibliographic Details

Published in:	Engineering, technology & applied science research Vol. 14; no. 2; pp. 13547 - 13553
Main Authors:	Alhomoud, Ahmed, Ghodhbani, Refka, Saidani, Taoufik, Zayani, Hafedh Mahmoud, Said, Yahia, Ammar, Mohamed Ben, Slimane, Jihane Ben
Format:	Journal Article
Language:	English
Published:	01.04.2024
ISSN:	2241-4487, 1792-8036
Online Access:	Get full text
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