APA-Zitierstil (7. Ausg.)

Charumathi, V., Balamurugan, N. B., Suguna, M., & Kumar, D. S. (2024). Optimization and performance indication of surrounding gate tunnel field‐effect transistors based on machine learning. International journal of numerical modelling, 37(3), -n/a. https://doi.org/10.1002/jnm.3257

Chicago-Zitierstil (17. Ausg.)

Charumathi, V., N. B. Balamurugan, M. Suguna, und D. Sriram Kumar. "Optimization and Performance Indication of Surrounding Gate Tunnel Field‐effect Transistors Based on Machine Learning." International Journal of Numerical Modelling 37, no. 3 (2024): -n/a. https://doi.org/10.1002/jnm.3257.

MLA-Zitierstil (9. Ausg.)

Charumathi, V., et al. "Optimization and Performance Indication of Surrounding Gate Tunnel Field‐effect Transistors Based on Machine Learning." International Journal of Numerical Modelling, vol. 37, no. 3, 2024, pp. -n/a, https://doi.org/10.1002/jnm.3257.

Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.