Synthesis of multilevel NAND gate circuits for incompletely specified multi-output Boolean functions and CAD using permissible cubes and PCRM graphs

A computer-aided design procedure for the automatic design of multilevel NAND gate logic networks as encountered in the synthesis of VLSI logic circuits is presented. A powerful technique using logic zero-one-interaction of permissible cubes is among the salient features in the synthesizing algorith...

Full description

Bibliographic Details

Published in:	International journal of electronics Vol. 78; no. 2; pp. 303 - 316
Main Authors:	CHEN, LIANG-CHIA, TWU, HORNG-TAY
Format:	Journal Article
Language:	English
Published:	London Taylor & Francis Group 01.02.1995 Taylor & Francis
Subjects:	Applied sciences Circuit properties Digital circuits Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology
ISSN:	0020-7217, 1362-3060
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!