An empirical evaluation of High-Level Synthesis languages and tools for database acceleration

High Level Synthesis (HLS) languages and tools are emerging as the most promising technique to make FPGAs more accessible to software developers. Nevertheless, picking the most suitable HLS for a certain class of algorithms depends on requirements such as area and throughput, as well as on programme...

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Vydáno v:International Conference on Field-programmable Logic and Applications s. 1 - 8
Hlavní autoři: Arcas-Abella, Oriol, Ndu, Geoffrey, Sonmez, Nehir, Ghasempour, Mohsen, Armejach, Adria, Navaridas, Javier, Wei Song, Mawer, John, Cristal, Adrian, Lujan, Mikel
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: Technical University of Munich (TUM) 01.09.2014
Témata:
Acceleration
Field programmable gate arrays
Hardware
Hardware design languages
Probes
Sorting
ISSN:1946-147X
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Shrnutí:High Level Synthesis (HLS) languages and tools are emerging as the most promising technique to make FPGAs more accessible to software developers. Nevertheless, picking the most suitable HLS for a certain class of algorithms depends on requirements such as area and throughput, as well as on programmer experience. In this paper, we explore the different trade-offs present when using a representative set of HLS tools in the context of Database Management Systems (DBMS) acceleration. More specifically, we conduct an empirical analysis of four representative frameworks (Bluespec SystemVerilog, Altera OpenCL, LegUp and Chisel) that we utilize to accelerate commonly-used database algorithms such as sorting, the median operator, and hash joins. Through our implementation experience and empirical results for database acceleration, we conclude that the selection of the most suitable HLS depends on a set of orthogonal characteristics, which we highlight for each HLS framework.
ISSN:1946-147X
DOI:10.1109/FPL.2014.6927484