A High-Throughput Constructive Interference Precoder for 16 × MU-MIMO Systems
In a multiuser multiple-input multiple-output (MU-MIMO) downlink system, users are susceptible to interuser interference (IUI) because of data being simultaneously transmitted over the same time-frequency resources. Conventionally, precoding algorithms aim to eliminate the IUI. However, constructive...
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| Vydané v: | IEEE transactions on very large scale integration (VLSI) systems Ročník 32; číslo 10; s. 1878 - 1888 |
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| Jazyk: | English |
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IEEE
01.10.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
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| Abstract | In a multiuser multiple-input multiple-output (MU-MIMO) downlink system, users are susceptible to interuser interference (IUI) because of data being simultaneously transmitted over the same time-frequency resources. Conventionally, precoding algorithms aim to eliminate the IUI. However, constructive interference (CI) precoding can achieve better error performance by exploiting the IUI. This article presents a high-throughput CI precoder. Design optimization across the algorithm and the architecture layers is conducted, reducing the complexity for multiplications by 81.6%. As the number of iterations for convergence varies, dynamic resource allocation is utilized to support each modulation mode with maximized utilization: time-multiplexing for the 4-QAM mode and parallel-processing for the 16-QAM mode. The proposed symbol updater also allows more efficient scheduling. As a proof of concept, a CI precoder chip that supports up to <inline-formula> <tex-math notation="LaTeX">16 \times </tex-math></inline-formula> MU-MIMO systems is designed based in a 40-nm CMOS technology. The performance gains at a bit error rate (BER) <inline-formula> <tex-math notation="LaTeX">= 10^{-4} </tex-math></inline-formula> are 10.7 and 12.5 dB for 4-QAM and 16-QAM, respectively, compared with conventional regularized zero-forcing (RZF) schemes. The precoder delivers a maximum throughput of 3.2 Gb/s at a clock frequency of 200 MHz for the <inline-formula> <tex-math notation="LaTeX">16 \times </tex-math></inline-formula> MU-MIMO configuration. |
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| AbstractList | In a multiuser multiple-input multiple-output (MU-MIMO) downlink system, users are susceptible to interuser interference (IUI) because of data being simultaneously transmitted over the same time-frequency resources. Conventionally, precoding algorithms aim to eliminate the IUI. However, constructive interference (CI) precoding can achieve better error performance by exploiting the IUI. This article presents a high-throughput CI precoder. Design optimization across the algorithm and the architecture layers is conducted, reducing the complexity for multiplications by 81.6%. As the number of iterations for convergence varies, dynamic resource allocation is utilized to support each modulation mode with maximized utilization: time-multiplexing for the 4-QAM mode and parallel-processing for the 16-QAM mode. The proposed symbol updater also allows more efficient scheduling. As a proof of concept, a CI precoder chip that supports up to <inline-formula> <tex-math notation="LaTeX">16 \times </tex-math></inline-formula> MU-MIMO systems is designed based in a 40-nm CMOS technology. The performance gains at a bit error rate (BER) <inline-formula> <tex-math notation="LaTeX">= 10^{-4} </tex-math></inline-formula> are 10.7 and 12.5 dB for 4-QAM and 16-QAM, respectively, compared with conventional regularized zero-forcing (RZF) schemes. The precoder delivers a maximum throughput of 3.2 Gb/s at a clock frequency of 200 MHz for the <inline-formula> <tex-math notation="LaTeX">16 \times </tex-math></inline-formula> MU-MIMO configuration. In a multiuser multiple-input multiple-output (MU-MIMO) downlink system, users are susceptible to interuser interference (IUI) because of data being simultaneously transmitted over the same time-frequency resources. Conventionally, precoding algorithms aim to eliminate the IUI. However, constructive interference (CI) precoding can achieve better error performance by exploiting the IUI. This article presents a high-throughput CI precoder. Design optimization across the algorithm and the architecture layers is conducted, reducing the complexity for multiplications by 81.6%. As the number of iterations for convergence varies, dynamic resource allocation is utilized to support each modulation mode with maximized utilization: time-multiplexing for the 4-QAM mode and parallel-processing for the 16-QAM mode. The proposed symbol updater also allows more efficient scheduling. As a proof of concept, a CI precoder chip that supports up to [Formula Omitted] MU-MIMO systems is designed based in a 40-nm CMOS technology. The performance gains at a bit error rate (BER) [Formula Omitted] are 10.7 and 12.5 dB for 4-QAM and 16-QAM, respectively, compared with conventional regularized zero-forcing (RZF) schemes. The precoder delivers a maximum throughput of 3.2 Gb/s at a clock frequency of 200 MHz for the [Formula Omitted] MU-MIMO configuration. |
| Author | Chiou, Ren-Hao Lin, Yu-Cheng Yang, Chia-Hsiang |
| Author_xml | – sequence: 1 givenname: Yu-Cheng orcidid: 0009-0006-1088-9108 surname: Lin fullname: Lin, Yu-Cheng organization: Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan – sequence: 2 givenname: Ren-Hao surname: Chiou fullname: Chiou, Ren-Hao organization: Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan – sequence: 3 givenname: Chia-Hsiang orcidid: 0000-0003-1163-321X surname: Yang fullname: Yang, Chia-Hsiang email: chyee@ntu.edu.tw organization: Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan |
| BookMark | eNpNkM9OwkAQhzcGEwF9AeNhE8_F_ddt90iIShMQE8DrpuxOoUS6uNuS8CQ-kC9mEQ7OZebw-2YmXw91KlcBQveUDCgl6mnxMZlnA0aYGHDBOBf0CnVpHCeRaqvTzkTyKGWU3KBeCFtCqBCKdNHbEI_L9SZabLxr1pt9U-ORq0LtG1OXB8BZVYMvwENlAL97MM6Cx4XzmEr8842ny2iaTWd4fgw17MItui7yzwB3l95Hy5fnxWgcTWav2Wg4iQyVrI6stUmsbA6iYDYxzKyUMJybFWUmzYFTYlNLV4zETKVKtr-yVNlCESY5AcJ5Hz2e9-69-2og1HrrGl-1JzVvhQiZcKnaFDunjHcheCj03pe73B81JfrkTf950ydv-uKthR7OUAkA_4BYSc4Y_wVhuGpV |
| CODEN | IEVSE9 |
| Cites_doi | 10.1109/TCOMM.2020.3031616 10.1109/TSP.2014.2362880 10.1109/TCSI.2019.2899211 10.1109/TCSI.2016.2604380 10.1109/TSP.2003.821110 10.1525/9780520411586-036 10.1109/TCOMM.2004.840638 10.1109/TWC.2017.2712604 10.1109/TIT.1983.1056659 10.1109/TSP.2012.2218812 10.1109/TCSII.2013.2291074 10.1007/s10107-002-0339-5 10.1109/TWC.2018.2869382 10.1109/TCSI.2019.2893274 10.1109/TWC.2018.2876229 10.1109/ICC.2007.470 10.1109/TWC.2018.2860011 10.1109/TIT.2003.814483 10.1109/MCOM.2004.1341262 |
| ContentType | Journal Article |
| Copyright | Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2024 |
| Copyright_xml | – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2024 |
| DBID | 97E RIA RIE AAYXX CITATION 7SP 8FD L7M |
| DOI | 10.1109/TVLSI.2024.3423341 |
| DatabaseName | IEEE Xplore (IEEE) IEEE All-Society Periodicals Package (ASPP) 1998-Present IEEE Electronic Library (IEL) CrossRef Electronics & Communications Abstracts Technology Research Database Advanced Technologies Database with Aerospace |
| DatabaseTitle | CrossRef Technology Research Database Advanced Technologies Database with Aerospace Electronics & Communications Abstracts |
| DatabaseTitleList | Technology Research Database |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering |
| EISSN | 1557-9999 |
| EndPage | 1888 |
| ExternalDocumentID | 10_1109_TVLSI_2024_3423341 10596322 |
| Genre | orig-research |
| GrantInformation_xml | – fundername: National Science and Technology Council (NSTC) of Taiwan grantid: NSTC 112-2218-E-002-034 funderid: 10.13039/501100007530 |
| GroupedDBID | -~X .DC 0R~ 29I 3EH 4.4 5GY 5VS 6IK 97E AAJGR AARMG AASAJ AAWTH ABAZT ABFSI ABQJQ ABVLG ACGFS ACIWK AENEX AETIX AGQYO AGSQL AHBIQ AI. AIBXA AKJIK AKQYR ALLEH ALMA_UNASSIGNED_HOLDINGS ATWAV BEFXN BFFAM BGNUA BKEBE BPEOZ CS3 DU5 E.L EBS EJD HZ~ H~9 ICLAB IEDLZ IFIPE IFJZH IPLJI JAVBF LAI M43 O9- OCL P2P RIA RIE RNS TN5 VH1 AAYXX CITATION 7SP 8FD L7M |
| ID | FETCH-LOGICAL-c162t-ddd759dae4f2d7c2cb94c33cb12c8ae310d8d1b20529896144289df902630e033 |
| IEDL.DBID | RIE |
| ISSN | 1063-8210 |
| IngestDate | Mon Jun 30 15:45:02 EDT 2025 Sat Nov 29 03:36:22 EST 2025 Wed Aug 27 01:59:09 EDT 2025 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 10 |
| Language | English |
| License | https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html https://doi.org/10.15223/policy-029 https://doi.org/10.15223/policy-037 |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c162t-ddd759dae4f2d7c2cb94c33cb12c8ae310d8d1b20529896144289df902630e033 |
| Notes | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| ORCID | 0000-0003-1163-321X 0009-0006-1088-9108 |
| PQID | 3110467369 |
| PQPubID | 85424 |
| PageCount | 11 |
| ParticipantIDs | ieee_primary_10596322 crossref_primary_10_1109_TVLSI_2024_3423341 proquest_journals_3110467369 |
| PublicationCentury | 2000 |
| PublicationDate | 2024-Oct. |
| PublicationDateYYYYMMDD | 2024-10-01 |
| PublicationDate_xml | – month: 10 year: 2024 text: 2024-Oct. |
| PublicationDecade | 2020 |
| PublicationPlace | New York |
| PublicationPlace_xml | – name: New York |
| PublicationTitle | IEEE transactions on very large scale integration (VLSI) systems |
| PublicationTitleAbbrev | TVLSI |
| PublicationYear | 2024 |
| Publisher | IEEE The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher_xml | – name: IEEE – name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| References | ref13 ref12 ref23 ref15 Krylov (ref22) 1972; 1 ref11 ref10 ref21 Nocedal (ref14) 2006 Nutini (ref18) ref2 ref1 ref17 ref16 ref19 ref8 ref7 ref9 ref4 ref3 Li (ref20) 2020 ref6 ref5 |
| References_xml | – ident: ref8 doi: 10.1109/TCOMM.2020.3031616 – ident: ref16 doi: 10.1109/TSP.2014.2362880 – ident: ref13 doi: 10.1109/TCSI.2019.2899211 – ident: ref11 doi: 10.1109/TCSI.2016.2604380 – ident: ref15 doi: 10.1109/TSP.2003.821110 – volume: 1 start-page: 168 year: 1972 ident: ref22 publication-title: Computational Methods of Higher Mathematics – ident: ref17 doi: 10.1525/9780520411586-036 – year: 2020 ident: ref20 article-title: Symbol-level precoding made practical for multi-level modulations via block-level rescaling publication-title: arXiv:2006.15245 – ident: ref4 doi: 10.1109/TCOMM.2004.840638 – ident: ref10 doi: 10.1109/TWC.2017.2712604 – ident: ref2 doi: 10.1109/TIT.1983.1056659 – start-page: 467 volume-title: Numerical Optimization year: 2006 ident: ref14 – ident: ref19 doi: 10.1109/TSP.2012.2218812 – ident: ref23 doi: 10.1109/TCSII.2013.2291074 – ident: ref6 doi: 10.1007/s10107-002-0339-5 – ident: ref7 doi: 10.1109/TWC.2018.2869382 – ident: ref12 doi: 10.1109/TCSI.2019.2893274 – ident: ref9 doi: 10.1109/TWC.2018.2876229 – ident: ref5 doi: 10.1109/ICC.2007.470 – ident: ref21 doi: 10.1109/TWC.2018.2860011 – ident: ref1 doi: 10.1109/TIT.2003.814483 – start-page: 1632 volume-title: Proc. 32nd Int. Conf. Mach. Learn. ident: ref18 article-title: Coordinate descent converges faster with the Gauss–Southwell rule than random selection – ident: ref3 doi: 10.1109/MCOM.2004.1341262 |
| SSID | ssj0014490 |
| Score | 2.4162111 |
| Snippet | In a multiuser multiple-input multiple-output (MU-MIMO) downlink system, users are susceptible to interuser interference (IUI) because of data being... |
| SourceID | proquest crossref ieee |
| SourceType | Aggregation Database Index Database Publisher |
| StartPage | 1878 |
| SubjectTerms | Algorithms Bit error rate Constructive interference (CI) Design optimization Downlink downlink precoding Interference Iterative algorithms MIMO communication multiuser multiple-input multiple-output (MU-MIMO) Optimization Precoding Quadrature amplitude modulation Resource allocation Symbols Time multiplexing Vectors VLSI architecture |
| Title | A High-Throughput Constructive Interference Precoder for 16 × MU-MIMO Systems |
| URI | https://ieeexplore.ieee.org/document/10596322 https://www.proquest.com/docview/3110467369 |
| Volume | 32 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVIEE databaseName: IEEE Electronic Library (IEL) customDbUrl: eissn: 1557-9999 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0014490 issn: 1063-8210 databaseCode: RIE dateStart: 19930101 isFulltext: true titleUrlDefault: https://ieeexplore.ieee.org/ providerName: IEEE |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV27TsMwFL2iFQMMPIsoFOSBDblNbMexxwpRUYmWSrSoW5TYjsRSqr5-hQ_ix_AjRSDEwJYhjqJjJ77H995zAG6SlNCcM42pigRmSVRiUXDLUogRMpZJGVVmE-lwKKZTOaqa1X0vjDHGF5-Ztrv0uXz9ptbuqKzjYgFuV2ANamnKQ7PWV8qAMRmkBzjFwhKZbYdMJDvjl8fnvuWChLWd4B1l8Y9dyNuq_PoX-w2md_jPVzuCgyqSRN0w9cewY2YnsP9NX_AUhl3k6jjwOJjxzNcr5Aw6g2TsxiB_HFg1_KGR48baLJANY1HM0cc7GkzwoD94QpWseQMmvfvx3QOuDBSwijlZYa11mkidG1YSnSqiCskUpaqIiRK5sZGdFjouiMv2CemooaVfupSWl9HIRJSeQX32NjPngIRUeemkdDRxVupJwQSjJc-5KN0A3YTbLaDZPOhkZJ5fRDLz8GcO_qyCvwkNB-G3OwN6TWhtJyGrvqVlRmOXh04plxd_DLuEPff0UGPXgrqF0VzBrtqsXpeLa79MPgGy_rhQ |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3LTsMwEFxBQQIOPIsoFPCBGzIktuPYxwpRtaItlWgRtyixHYlLW_X1K3wQP4btpKgIceCWQ6xEYyfe8e7OANxEMaEpZxpTFQjMoiDHIuOWpRAjZCijPCjNJuJeT7y9yX7ZrO57YYwxvvjM3LlLn8vXY7VwR2X3LhbgdgVuwlbEGAmKdq3vpAFjshAf4BQLS2VWPTKBvB-8dl7alg0Sduck7ygLf-xD3ljl19_YbzHNg3--3CHsl7EkahSTfwQbZnQMe2sKgyfQayBXyYEHhR3PZDFHzqKzEI1dGuQPBMuWP9R37FibKbKBLAo5-vxA3SHutrvPqBQ2r8Kw-Th4aOHSQgGrkJM51lrHkdSpYTnRsSIqk0xRqrKQKJEaG9tpocOMuHyfkI4cWgKmc2mZGQ1MQOkpVEbjkTkDJKRKcyemo4kzU48yJhjNecpF7gboGtyuAE0mhVJG4hlGIBMPf-LgT0r4a1B1EK7dWaBXg_pqEpLya5olNHSZ6Jhyef7HsGvYaQ26naTT7j1dwK57UlFxV4eKhdRcwrZazt9n0yu_ZL4AeF-7lw |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=A+High-Throughput+Constructive+Interference+Precoder+for+16+%C3%97+MU-MIMO+Systems&rft.jtitle=IEEE+transactions+on+very+large+scale+integration+%28VLSI%29+systems&rft.au=Lin%2C+Yu-Cheng&rft.au=Chiou%2C+Ren-Hao&rft.au=Yang%2C+Chia-Hsiang&rft.date=2024-10-01&rft.pub=IEEE&rft.issn=1063-8210&rft.volume=32&rft.issue=10&rft.spage=1878&rft.epage=1888&rft_id=info:doi/10.1109%2FTVLSI.2024.3423341&rft.externalDocID=10596322 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1063-8210&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1063-8210&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1063-8210&client=summon |