Zhu, S. (2015). Hardware Implementation of AES Encryption and Decryption System Based on FPGA. The open cybernetics & systemics journal, 9(1), 1373-1377. https://doi.org/10.2174/1874110X01509011373
Citace podle Chicago (17th ed.)Zhu, Shihai. "Hardware Implementation of AES Encryption and Decryption System Based on FPGA." The Open Cybernetics & Systemics Journal 9, no. 1 (2015): 1373-1377. https://doi.org/10.2174/1874110X01509011373.
Citace podle MLA (9th ed.)Zhu, Shihai. "Hardware Implementation of AES Encryption and Decryption System Based on FPGA." The Open Cybernetics & Systemics Journal, vol. 9, no. 1, 2015, pp. 1373-1377, https://doi.org/10.2174/1874110X01509011373.
Upozornění: Tyto citace jsou generovány automaticky. Nemusí být zcela správně podle citačních pravidel..