APA (7th ed.) Citation

Yeong, M. K., & Ho, E. T. W. (2023). Recurrent neural network implementation of digital integrated circuits to mitigate challenges in design verification. Review of Computer Engineering Research, 10(3), 122-136. https://doi.org/10.18488/76.v10i3.3512

Chicago Style (17th ed.) Citation

Yeong, Ming Keat, and Eric Tatt Wei Ho. "Recurrent Neural Network Implementation of Digital Integrated Circuits to Mitigate Challenges in Design Verification." Review of Computer Engineering Research 10, no. 3 (2023): 122-136. https://doi.org/10.18488/76.v10i3.3512.

MLA (9th ed.) Citation

Yeong, Ming Keat, and Eric Tatt Wei Ho. "Recurrent Neural Network Implementation of Digital Integrated Circuits to Mitigate Challenges in Design Verification." Review of Computer Engineering Research, vol. 10, no. 3, 2023, pp. 122-136, https://doi.org/10.18488/76.v10i3.3512.