APA-Zitierstil (7. Ausg.)

Yeong, M. K., & Ho, E. T. W. (2023). Recurrent neural network implementation of digital integrated circuits to mitigate challenges in design verification. Review of Computer Engineering Research, 10(3), 122-136. https://doi.org/10.18488/76.v10i3.3512

Chicago-Zitierstil (17. Ausg.)

Yeong, Ming Keat, und Eric Tatt Wei Ho. "Recurrent Neural Network Implementation of Digital Integrated Circuits to Mitigate Challenges in Design Verification." Review of Computer Engineering Research 10, no. 3 (2023): 122-136. https://doi.org/10.18488/76.v10i3.3512.

MLA-Zitierstil (9. Ausg.)

Yeong, Ming Keat, und Eric Tatt Wei Ho. "Recurrent Neural Network Implementation of Digital Integrated Circuits to Mitigate Challenges in Design Verification." Review of Computer Engineering Research, vol. 10, no. 3, 2023, pp. 122-136, https://doi.org/10.18488/76.v10i3.3512.

Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.