A PARALLEL AND VECTOR IMPLEMENTATION OF CIRCUIT SIMULATION ON CRAY SUPERCOMPUTERS

This paper reports the results of vectorizing and parallelizing the circuit simulator HSPICE on the Cray C90 supercomputer. The results show that significant speedup of circuit simulation is achievable when the transistor model evaluation and the Jacobian matrix update are vectorized and parallelize...

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Bibliographic Details
Published in:Parallel algorithms and applications Vol. 14; no. 2; pp. 109 - 118
Main Authors: BATAINEH, ABDULLA, AAMODT, MIKE, THOMAS, KEVIN
Format: Journal Article
Language:English
Published: Taylor & Francis Group 01.07.1999
Subjects:
Circuit simulation
Parallel processing
Vector processing
ISSN:1063-7192
Online Access:Get full text
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Summary:This paper reports the results of vectorizing and parallelizing the circuit simulator HSPICE on the Cray C90 supercomputer. The results show that significant speedup of circuit simulation is achievable when the transistor model evaluation and the Jacobian matrix update are vectorized and parallelized efficiently. A speedup of 40 times on 16 vector processors was achieved for MOSFET transistor model evaluation component. Furthermore, matrix update time was reduced by one order of magnitude and the solver time was reduced by a factor of 2 to 5 for the four circuits simulated. As a result, a total simulation speedup of about 12 times on 16 vector processors was achieved.
ISSN:1063-7192
DOI:10.1080/10637199808947381