A PARALLEL AND VECTOR IMPLEMENTATION OF CIRCUIT SIMULATION ON CRAY SUPERCOMPUTERS

This paper reports the results of vectorizing and parallelizing the circuit simulator HSPICE on the Cray C90 supercomputer. The results show that significant speedup of circuit simulation is achievable when the transistor model evaluation and the Jacobian matrix update are vectorized and parallelize...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:Parallel algorithms and applications Ročník 14; číslo 2; s. 109 - 118
Hlavní autoři: BATAINEH, ABDULLA, AAMODT, MIKE, THOMAS, KEVIN
Médium: Journal Article
Jazyk:angličtina
Vydáno: Taylor & Francis Group 01.07.1999
Témata:
ISSN:1063-7192
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Popis
Shrnutí:This paper reports the results of vectorizing and parallelizing the circuit simulator HSPICE on the Cray C90 supercomputer. The results show that significant speedup of circuit simulation is achievable when the transistor model evaluation and the Jacobian matrix update are vectorized and parallelized efficiently. A speedup of 40 times on 16 vector processors was achieved for MOSFET transistor model evaluation component. Furthermore, matrix update time was reduced by one order of magnitude and the solver time was reduced by a factor of 2 to 5 for the four circuits simulated. As a result, a total simulation speedup of about 12 times on 16 vector processors was achieved.
ISSN:1063-7192
DOI:10.1080/10637199808947381