Boolean Technology Mapping Based on Logic Decomposition
The decomposition tree of a logic function first appears in the work of Ashenhurst [1]. It is a canonical [1, 2], tree-like logic network representing the decomposition properties of that function. We present an algorithm for technology mapping based on the use of such trees for the representation o...
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| Published in: | 16th Brazilian Symposium on Integrated Circuit Design (SBCCI 2003) p. 35 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
Washington, DC, USA
IEEE Computer Society
08.09.2003
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| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 076952009X, 9780769520094 |
| Online Access: | Get full text |
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