The program decision logic approach to predicated execution

Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the major impediments to achieving this goal has been inefficient programmatic control flow. Historically, the compiler has...

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Vydáno v:Proceedings of the 26th annual international symposium on Computer architecture s. 208 - 219
Hlavní autoři: August, David I., Sias, John W., Puiatti, Jean-Michel, Mahlke, Scott A., Connors, Daniel A., Crozier, Kevin M., Hwu, Wen-mei W.
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: Washington, DC, USA IEEE Computer Society 01.05.1999
Edice:ACM Conferences
Témata:
Hardware > Electronic design automation > Methodologies for EDA
Hardware > Integrated circuits > Logic circuits
Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits
Hardware > Integrated circuits > Logic circuits > Design modules and hierarchy
Software and its engineering > Software notations and tools > Compilers
ISBN:0769501702, 9780769501703
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Abstract Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the major impediments to achieving this goal has been inefficient programmatic control flow. Historically, the compiler has translated the programmer's original control structure directly into assembly code with conditional branch instructions. Eliminating inefficiencies in handling branch instructions and exploiting ILP has been the subject of much research. However, traditional branch handling techniques cannot significantly alter the program's inherent control structure. The advent of predication as a program control representation has enabled compilers to manipulate control in a form more closely related to the underlying program logic. This work takes full advantage of the predication paradigm by abstracting the program control flow into a logical form referred to as a program decision logic network. This network is modeled as a Boolean equation and minimized using modified versions of logic synthesis techniques. After minimization, the more efficient version of the program's original control flow is re-expressed in predicated code. Furthermore, this paper proposes extensions to the HPL PlayDoh predication model in support of more effective predicate decision logic network minimization. Finally, this paper shows the ability of the mechanisms presented to overcome limits on ILP previously imposed by rigid program control structure.
AbstractList Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the major impediments to achieving this goal has been inefficient programmatic control flow. Historically, the compiler has translated the programmer's original control structure directly into assembly code with conditional branch instructions. Eliminating inefficiencies in handling branch instructions and exploiting ILP has been the subject of much research. However, traditional branch handling techniques cannot significantly alter the program's inherent control structure. The advent of predication as a program control representation has enabled compilers to manipulate control in a form more closely related to the underlying program logic. This work takes full advantage of the predication paradigm by abstracting the program control flow into a logical form referred to as a program decision logic network. This network is modeled as a Boolean equation and minimized using modified versions of logic synthesis techniques. After minimization, the more efficient version of the program's original control flow is re-expressed in predicated code. Furthermore, this paper proposes extensions to the HPL PlayDoh predication model in support of more effective predicate decision logic network minimization. Finally, this paper shows the ability of the mechanisms presented to overcome limits on ILP previously imposed by rigid program control structure.
Author August, David I.
Mahlke, Scott A.
Hwu, Wen-mei W.
Connors, Daniel A.
Sias, John W.
Crozier, Kevin M.
Puiatti, Jean-Michel
Author_xml – sequence: 1
  givenname: David I.
  surname: August
  fullname: August, David I.
  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
– sequence: 2
  givenname: John W.
  surname: Sias
  fullname: Sias, John W.
  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
– sequence: 3
  givenname: Jean-Michel
  surname: Puiatti
  fullname: Puiatti, Jean-Michel
  organization: Logic Systems Laboratory (DI-LSL), Swiss Federal Institute of Technology of Lausanne (EPFL), CH-1015 Lausanne, Switzerland
– sequence: 4
  givenname: Scott A.
  surname: Mahlke
  fullname: Mahlke, Scott A.
  organization: Hewlett-Packard Laboratories, Hewlett-Packard, Palo Alto, CA
– sequence: 5
  givenname: Daniel A.
  surname: Connors
  fullname: Connors, Daniel A.
  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
– sequence: 6
  givenname: Kevin M.
  surname: Crozier
  fullname: Crozier, Kevin M.
  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
– sequence: 7
  givenname: Wen-mei W.
  surname: Hwu
  fullname: Hwu, Wen-mei W.
  organization: Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
BookMark eNqNj01LAzEURQMqaGuX7rNy5bQvzSTpw5UUq0Khm9mHl49pR9tJmRnBn2_K-AN8m8vjHi6cCbtuUxsZexAwF6JUCwmABueXQHPFJmA0KhAGlrds1vefkK9UAjXcsefqEPm5S_uOTjxE3_RNavkx7RvP6ZwL8gc-pIzE0HgaYuDxJ_rvIWP37KamYx9nfzll1ea1Wr8X293bx_plWxCiLgyFOmhJIJ1DUUoFyqGsJQQtggAIK4MkolpJI1Es66DI57ekoLVxGuWUPY2z5E_WpfTVWwH2YmpHUzuaWtc1sc74479w-QsaHFUC
ContentType Conference Proceeding
Copyright Copyright (c) 1998 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Copyright_xml – notice: Copyright (c) 1998 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
DOI 10.1145/300979.300997
DatabaseTitleList
DeliveryMethod fulltext_linktorsrc
EndPage 219
GroupedDBID 6IE
6IH
6IK
6IL
AAJGR
ACGHX
ACM
ADPZR
ALMA_UNASSIGNED_HOLDINGS
APO
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
GUFHI
OCL
RIB
RIC
RIE
RIL
RIO
ID FETCH-LOGICAL-a996-7adfd63a03bb9143505b93f30d61d100d879a1e58373912fd5ac1e54ad667b693
ISBN 0769501702
9780769501703
IngestDate Wed Jan 31 06:44:40 EST 2024
IsPeerReviewed false
IsScholarly false
Language English
LinkModel OpenURL
MeetingName ISCA99: International Symposium on Computer Architecture
MergedId FETCHMERGED-LOGICAL-a996-7adfd63a03bb9143505b93f30d61d100d879a1e58373912fd5ac1e54ad667b693
PageCount 12
ParticipantIDs acm_books_10_1145_300979_300997
acm_books_10_1145_300979_300997_brief
PublicationCentury 1900
PublicationDate 19990501
PublicationDateYYYYMMDD 1999-05-01
PublicationDate_xml – month: 05
  year: 1999
  text: 19990501
  day: 01
PublicationDecade 1990
PublicationPlace Washington, DC, USA
PublicationPlace_xml – name: Washington, DC, USA
PublicationSeriesTitle ACM Conferences
PublicationTitle Proceedings of the 26th annual international symposium on Computer architecture
PublicationYear 1999
Publisher IEEE Computer Society
Publisher_xml – name: IEEE Computer Society
SSID ssj0000451960
Score 1.2714783
Snippet Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW...
SourceID acm
SourceType Publisher
StartPage 208
SubjectTerms Hardware -- Electronic design automation -- Methodologies for EDA
Hardware -- Integrated circuits -- Logic circuits
Hardware -- Integrated circuits -- Logic circuits -- Arithmetic and datapath circuits
Hardware -- Integrated circuits -- Logic circuits -- Design modules and hierarchy
Software and its engineering -- Software notations and tools -- Compilers
Title The program decision logic approach to predicated execution
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwtV3Nb9MwFLe6iQM30IYYH8MHOFUZTv0Va6cJDQGCqYcedouc2oZKazY1zVT-Av5t_GznYwNp4sAlbazWUfx7sV_e-72fEXpLGHOWOJkJaVnG_CycKc5sZlzlpNW55S5I5n-VFxfF5aWaTya_ulqY2ytZ18Vup27-K9S-zYMNpbP_AHffqW_w3z3o_uhh98d7HvFfF59539h0-f-ZCPVrQUh_dScC2PxcA2urXUPOoNvgYTpOLtw3qcTnmpq0N880zJ29NDm4sjebkPwBV9bu7LIdp_rP2u9trDIJZPrp55M-xLNKpWWBytM3z1tvO5Fy8MXqOovU1SGO_uMqsYuCxsRZ_B-Ms228mX0bVTSOAhxRFIGPAxzw0juMQOKyDm_BRArFQQRoNp6GSTFa0dOk_OdiwUBXg0IpizqBDyX30J6UeSwD7EN1QYJHkBj0SRdL2k3dOe3kWxl_f6dDcHqW65HLsniCDodbx4NRPEUTWx-gU48lTljiDkscsMQdlnh7jQcscY_lIVp8PF98-JSlfTQyDRRzqY0zgmpCq0qBe0x4paijxIjc5ISYQip4KAsqqcpnznC99KdMGyFkJRR9hvbr69o-R5hVTGvDifArPHPaVFbNJHGg4OSkEvIIvfF3W8LT0JSx5J2XcTzKOB5H6N0DvygrbyLuxYM9vUSPB2t5hfa3m9a-Ro-Wt9tVszkOCP4GZ1hk_Q
linkProvider IEEE
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+of+the+26th+annual+international+symposium+on+Computer+architecture&rft.atitle=The+program+decision+logic+approach+to+predicated+execution&rft.au=August%2C+David+I.&rft.au=Sias%2C+John+W.&rft.au=Puiatti%2C+Jean-Michel&rft.au=Mahlke%2C+Scott+A.&rft.series=ACM+Conferences&rft.date=1999-05-01&rft.pub=IEEE+Computer+Society&rft.isbn=0769501702&rft.spage=208&rft.epage=219&rft_id=info:doi/10.1145%2F300979.300997
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780769501703/lc.gif&client=summon&freeimage=true
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780769501703/mc.gif&client=summon&freeimage=true
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780769501703/sc.gif&client=summon&freeimage=true