Chatziantoniou, P., Tsigkanos, A., Theodoropoulos, D., Kranitis, N., & Paschalis, A. (2022, May 9). An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. arXiv.org. https://doi.org/10.48550/arxiv.2205.04123
Citace podle Chicago (17th ed.)Chatziantoniou, Panagiotis, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, a Antonis Paschalis. "An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology." ArXiv.org 9 May. 2022. https://doi.org/10.48550/arxiv.2205.04123.
Citace podle MLA (9th ed.)Chatziantoniou, Panagiotis, et al. "An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology." ArXiv.org, 9 May. 2022, https://doi.org/10.48550/arxiv.2205.04123.