Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing

Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and video processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP copro...

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Vydáno v:VLSI Design Ročník 2012; číslo 1; s. 146 - 162
Hlavní autoři: Saponara, Sergio, Fanucci, Luca
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York Hindawi Limiteds 01.01.2012
Hindawi Publishing Corporation
Hindawi Limited
Témata:
Algorithms
Architecture
Colleges & universities
Connectivity
Costs
Digital
Digital signal processing
Field programmable gate arrays
Fourier transforms
Infrastructure
Multimedia
Real time
Signal processing
Tiles
Topology
ISSN:1065-514X, 1563-5171
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Shrnutí:Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and video processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP coprocessor with local memory. The other MPSoC architecture exploits a heterogeneous-tile topology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different class of algorithms. In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC) infrastructure, through network interfaces and routers, which allows parallel operations of the multiple tiles. The functional performances and the implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS technology. Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an H.264/MPEG AVC video codec and of a low-distortion digital audio amplifier. The heterogeneous architecture ensures a higher power efficiency and a smaller area occupation and is more suited for low-power multimedia processing, such as in mobile devices. The homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP tasks in power-supplied devices.
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ISSN:1065-514X
1563-5171
DOI:10.1155/2012/450302