Answer Set versus Integer Linear Programming for Automatic Synthesis of Multiprocessor Systems from Real-Time Parallel Programs
An automated design approach for multiprocessor systems on FPGAs is presented which customizes architectures for parallel programs by simultaneously solving the problems of task mapping, resource allocation, and scheduling. The latter considers effects of fixed-priority preemptive scheduling in orde...
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| Vydáno v: | International Journal of Reconfigurable Computing Ročník 2009; číslo 1; s. 371 - 381 |
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| Jazyk: | angličtina |
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New York
Hindawi Limiteds
01.01.2009
Hindawi Publishing Corporation John Wiley & Sons, Inc |
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| ISSN: | 1687-7195, 1687-7209 |
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| Abstract | An automated design approach for multiprocessor systems on FPGAs is presented which customizes architectures for parallel programs by simultaneously solving the problems of task mapping, resource allocation, and scheduling. The latter considers effects of fixed-priority preemptive scheduling in order to guarantee real-time requirements, hence covering a broad spectrum of embedded applications. Being inherently a combinatorial optimization problem, the design space is modeled using linear equations that capture high-level design parameters. A comparison of two methods for solving resulting problem instances is then given. The intent is to study how well recent advances in propositional satisfiability (SAT) and thus Answer Set Programming (ASP) can be exploited to automate the design of flexible multiprocessor systems. Integer Linear Programming (ILP) is taken as a baseline, where architectures for IEEE 802.11g and WCDMA baseband signal processing are synthesized. ASP-based synthesis used a few seconds in the solver, faster by three orders of magnitude compared to ILP-based synthesis, thereby showing a great potential for solving difficult instances of the automated synthesis problem. |
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| AbstractList | An automated design approach for multiprocessor systems on FPGAs is presented which customizes architectures for parallel programs by simultaneously solving the problems of task mapping, resource allocation, and scheduling. The latter considers effects of fixed-priority preemptive scheduling in order to guarantee real-time requirements, hence covering a broad spectrum of embedded applications. Being inherently a combinatorial optimization problem, the design space is modeled using linear equations that capture high-level design parameters. A comparison of two methods for solving resulting problem instances is then given. The intent is to study how well recent advances in propositional satisfiability (SAT) and thus Answer Set Programming (ASP) can be exploited to automate the design of flexible multiprocessor systems. Integer Linear Programming (ILP) is taken as a baseline, where architectures for IEEE 802.11g and WCDMA baseband signal processing are synthesized. ASP-based synthesis used a few seconds in the solver, faster by three orders of magnitude compared to ILP-based synthesis, thereby showing a great potential for solving difficult instances of the automated synthesis problem. An automated design approach for multiprocessor systems on FPGAs is presented which customizes architectures for parallel programs by simultaneously solving the problems of task mapping, resource allocation, and scheduling. The latter considers effects of fixed‐priority preemptive scheduling in order to guarantee real‐time requirements, hence covering a broad spectrum of embedded applications. Being inherently a combinatorial optimization problem, the design space is modeled using linear equations that capture high‐level design parameters. A comparison of two methods for solving resulting problem instances is then given. The intent is to study how well recent advances in propositional satisfiability (SAT) and thus Answer Set Programming (ASP) can be exploited to automate the design of flexible multiprocessor systems. Integer Linear Programming (ILP) is taken as a baseline, where architectures for IEEE 802.11g and WCDMA baseband signal processing are synthesized. ASP‐based synthesis used a few seconds in the solver, faster by three orders of magnitude compared to ILP‐based synthesis, thereby showing a great potential for solving difficult instances of the automated synthesis problem. |
| Author | Christophe Bobda Philipp Mahr Martin Gebser Torsten Schaub Harold Ishebabi |
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| CitedBy_id | crossref_primary_10_1155_2010_570279 crossref_primary_10_1155_2013_328619 crossref_primary_10_1145_2701419 crossref_primary_10_1155_2012_790459 crossref_primary_10_1016_j_artint_2016_04_003 crossref_primary_10_3390_electronics13071404 crossref_primary_10_1016_j_artint_2012_04_001 crossref_primary_10_1016_j_sysarc_2013_10_004 crossref_primary_10_1017_S1471068425100288 |
| Cites_doi | 10.1145/1151074.1151077 10.1109/ICASSP.2006.1660832 10.1109/IPDPS.2007.370527 10.1145/1084834.1084903 10.1109/TPDS.2005.22 10.1145/1084834.1084857 10.1109/DATE.2006.243950 10.1145/1289816.1289874 10.1109/DDECS.2008.4538754 10.1109/ISCAS.2001.922298 10.1007/978-3-540-72200-7_23 10.1049/el:20010364 10.1109/26.650240 10.1145/1016720.1016737 10.1109/RECONF.2006.307779 10.1109/DATE.2007.364558 10.3233/SAT190014 10.1145/1284480.1284531 10.1109/DATE.2008.4484688 10.1007/s10009‐004‐0183‐4 10.1016/S0004‐3702(02)00187‐X 10.1016/j.micpro.2008.08.009 10.1109/ICASIC.2005.1611458 10.1002/0470017406 10.1109/TEVC.2005.860766 10.1109/35.714618 10.1109/ICASIC.2007.4415577 10.1145/321738.321743 10.1109/ISSOC.2007.4427441 10.1007/s10817‐006‐9033‐2 10.1109/RTCSA.2006.36 10.1109/32.387477 |
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| Title | Answer Set versus Integer Linear Programming for Automatic Synthesis of Multiprocessor Systems from Real-Time Parallel Programs |
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