Delay-optimal technology mapping by DAG covering

We propose an algorithm for minimal-delay technology mapping for library-based designs. We show that subject graphs need not be decomposed into trees for delay minimization; they can be mapped directly as DAGs. Experimental results demonstrate that significant delay improvement is possible by this n...

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Bibliographic Details
Published in:	DAC 98: DAC: 35th Annual ACM/IEEE Design Automation Conference pp. 348 - 351
Main Authors:	Kukimoto, Yuji, Brayton, Robert K., Sawkar, Prashant
Format:	Conference Proceeding
Language:	English
Published:	New York, NY, USA ACM 01.01.1998 IEEE
Series:	ACM Conferences
Subjects:	Algorithm design and analysis Applied computing > Physical sciences and engineering > Engineering Circuits Delay Design automation Dynamic programming Field programmable gate arrays Hardware > Emerging technologies Hardware > Robustness Hardware > Very large scale integration design Laboratories Mathematics of computing > Discrete mathematics Mathematics of computing > Mathematical software Permission Theory of computation > Design and analysis of algorithms > Data structures design and analysis > Pattern matching Tree graphs Vegetation mapping relaxed pins supply-demand global routing quadratic placement routing models congestion
ISBN:	0897919645, 9780897919647
Online Access:	Get full text
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