DTexL: Decoupled Raster Pipeline for Texture Locality

Contemporary GPU architectures have multiple shader cores and a scheduler that distributes work (threads) among them, focusing on load balancing. These load balancing techniques favor thread distributions that are detrimental to texture memory locality for graphics applications in the L1 Texture Cac...

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Bibliographic Details

Published in:	2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO) pp. 213 - 227
Main Authors:	Joseph, Diya, Aragon, Juan L., Parcerisa, Joan-Manuel, Gonzalez, Antonio
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.10.2022
Subjects:	Caches Focusing GPU Graphics Graphics processing units Instruction sets Low-power Microarchitecture Pipelines Scheduling Texture Locality Upper bound
Online Access:	Get full text
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