Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs

Literature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we surpass this exploration by fabricating a formal proof for a no-overhead quasi-optimal caching technique for caching textures in graphics work...

Full description

Saved in:
Bibliographic Details
Published in:2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) pp. 124 - 136
Main Authors: Joseph, Diya, Aragon, Juan L., Parcerisa, Joan-Manuel, Gonzalez, Antonio
Format: Conference Proceeding
Language:English
Published: IEEE 21.10.2023
Subjects:
Benchmark testing
Caches
Energy consumption
Energy efficiency
GPU
Graphics
Graphics processing units
Low-power
Memory management
Switches
Texture
Writing
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Abstract Literature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we surpass this exploration by fabricating a formal proof for a no-overhead quasi-optimal caching technique for caching textures in graphics workloads. Textures make up a significant part of main memory traffic in mobile GPUs, which contributes to the total GPU energy consumption. Since texture accesses use a shared L2 cache, improving the L2 texture caching efficiency would decrease main memory traffic, thus improving energy efficiency, which is crucial for mobile GPUs. Our proposal reaches quasi-optimality by exploiting the frame-to-frame reuse of textures in graphics. We do this by traversing frames in a boustrophedonic 1 1 Boustrophedon is a style of writing in which alternate lines of writing are reversed in order. This is in contrast to most modern languages, where the order of lines is the same, usually left-to-right. manner w.r.t. the frame-to-frame tile order. We first approximate the texture access trace to a circular trace and then forge a formal proof for our proposal being optimal for such traces. We also complement the proof with empirical data that demonstrates the quasi-optimality of our no-cost proposal.
AbstractList Literature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we surpass this exploration by fabricating a formal proof for a no-overhead quasi-optimal caching technique for caching textures in graphics workloads. Textures make up a significant part of main memory traffic in mobile GPUs, which contributes to the total GPU energy consumption. Since texture accesses use a shared L2 cache, improving the L2 texture caching efficiency would decrease main memory traffic, thus improving energy efficiency, which is crucial for mobile GPUs. Our proposal reaches quasi-optimality by exploiting the frame-to-frame reuse of textures in graphics. We do this by traversing frames in a boustrophedonic 1 1 Boustrophedon is a style of writing in which alternate lines of writing are reversed in order. This is in contrast to most modern languages, where the order of lines is the same, usually left-to-right. manner w.r.t. the frame-to-frame tile order. We first approximate the texture access trace to a circular trace and then forge a formal proof for our proposal being optimal for such traces. We also complement the proof with empirical data that demonstrates the quasi-optimality of our no-cost proposal.
Author Parcerisa, Joan-Manuel
Gonzalez, Antonio
Joseph, Diya
Aragon, Juan L.
Author_xml – sequence: 1
  givenname: Diya
  surname: Joseph
  fullname: Joseph, Diya
  organization: Universitat Politècnica de Catalunya,Barcelona,Spain
– sequence: 2
  givenname: Juan L.
  surname: Aragon
  fullname: Aragon, Juan L.
  organization: Universidad de Murcia,Murcia,Spain
– sequence: 3
  givenname: Joan-Manuel
  surname: Parcerisa
  fullname: Parcerisa, Joan-Manuel
– sequence: 4
  givenname: Antonio
  surname: Gonzalez
  fullname: Gonzalez, Antonio
  organization: Universitat Politècnica de Catalunya,Barcelona,Spain
BookMark eNotzt1KwzAYgOEICursHewgN9CaLz9N49ks2xQKm9Adj69p6gJbW5IW9O4duKP37OV5Jvf90DtClsAyAGZe96uyVgWAzjjjImOMgbkjidGmEIoJyZUUjySJ0TdMaS00N-KJrN-HOU5hGE-uHXpv6SbgxcU3-jVj9OlunPwFz7TitER78v037YZAa_czzcFF6nu63R_iC3no8BxdcuuCHDbruvxIq932s1xVKQrBp9QBysY02FkOum2chrwznSoUogWpdZtrUPqqUw20WtqiRZsjs0YiygJRLMjy_-udc8cxXG3h9whM5DJnUvwByglMgw
CODEN IEEPAD
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/PACT58117.2023.00019
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Xplore
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
EISBN 9798350342543
EndPage 136
ExternalDocumentID 10364604
Genre orig-research
GroupedDBID 6IE
6IL
ACM
ALMA_UNASSIGNED_HOLDINGS
APO
CBEJK
LHSKQ
RIE
RIL
ID FETCH-LOGICAL-a332t-e1a4b9bafc217dbe716f9f585aac1477d671570575b1d74c8dac6a0c94aa48aa3
IEDL.DBID RIE
ISICitedReferencesCount 1
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=001165646800011&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Wed Aug 27 02:24:17 EDT 2025
IsDoiOpenAccess false
IsOpenAccess true
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-a332t-e1a4b9bafc217dbe716f9f585aac1477d671570575b1d74c8dac6a0c94aa48aa3
OpenAccessLink http://hdl.handle.net/2117/403438
PageCount 13
ParticipantIDs ieee_primary_10364604
PublicationCentury 2000
PublicationDate 2023-Oct.-21
PublicationDateYYYYMMDD 2023-10-21
PublicationDate_xml – month: 10
  year: 2023
  text: 2023-Oct.-21
  day: 21
PublicationDecade 2020
PublicationTitle 2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT)
PublicationTitleAbbrev PACT
PublicationYear 2023
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssib057737293
Score 2.2424402
Snippet Literature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we...
SourceID ieee
SourceType Publisher
StartPage 124
SubjectTerms Benchmark testing
Caches
Energy consumption
Energy efficiency
GPU
Graphics
Graphics processing units
Low-power
Memory management
Switches
Texture
Writing
Title Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs
URI https://ieeexplore.ieee.org/document/10364604
WOSCitedRecordID wos001165646800011&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwELWgYmACRBHf8sDqEid2HLNB1cKASpBaqVt1_ohUCVLUNPx-fG4LYmBgi7JYOcfnd_a99wi5qazJhEodk16mTOTcMBDGsaRKJOgqQYXvaDahRqNiOtXlhqweuTDe-9h85nv4GO_y3cK2eFQWVniWixzVP3eVytdkre3PIxUaruhsQ48LQ9yW9_2xRCJlDz3CexHO_DJRiXvI8OCfox-S7g8bj5bf-8wR2fH1MRk8LPCUAlUBHKrb0iF2WTV39LWFZs5eQiZ4hzf6nNL-ul2SBnRKxyEVt6HApvOaPpaTpksmw8G4_8Q2lggMsixdMc9DJLWByoZSwhkfqp1KVwHyA1gulHK54lIhBjPcKWELBzaHxGoBIAqA7IR06kXtTwk1AkxurNNcOiE9gA7gzVqb8Yoboc0Z6WIMZh9r1YvZ9vPP_3h_QfYxzJjXU35JOqtl66_Inv1czZvldZyrL7MwlZk
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwELUQIMEEiCK-8cDqEid2XLNB1VJEKUFKpW7V-SNSJWhR0_D78aUtiIGBLcpi5Ryf39n33iPkurAmESp2THoZM5Fyw0AYx6IikqCLCBW-a7MJNRi0RiOdrcjqNRfGe183n_kmPtZ3-W5mKzwqCys8SUWK6p9bUog4WtK11r-PVGi5opMVQS4McpPdtXOJVMomuoQ3a0Dzy0al3kW6e_8cf580fvh4NPveaQ7Ihp8eks79DM8pUBfAob4t7WKfVXlLXysoJ-wl5IJ3eKP9mLaXDZM04FOah2RchRKbTqb0IRuWDTLsdvJ2j61MERgkSbxgnodYagOFDcWEMz7UO4UuAugHsFwo5VLFpUIUZrhTwrYc2BQiqwWAaAEkR2RzOpv6Y0KNAJMa6zSXTkgPoAN8s9YmvOBGaHNCGhiD8cdS92K8_vzTP95fkZ1e_twf9x8HT2dkF0OOWT7m52RzMa_8Bdm2n4tJOb-s5-0LrN6Y4A
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2023+32nd+International+Conference+on+Parallel+Architectures+and+Compilation+Techniques+%28PACT%29&rft.atitle=Boustrophedonic+Frames%3A+Quasi-Optimal+L2+Caching+for+Textures+in+GPUs&rft.au=Joseph%2C+Diya&rft.au=Aragon%2C+Juan+L.&rft.au=Parcerisa%2C+Joan-Manuel&rft.au=Gonzalez%2C+Antonio&rft.date=2023-10-21&rft.pub=IEEE&rft.spage=124&rft.epage=136&rft_id=info:doi/10.1109%2FPACT58117.2023.00019&rft.externalDocID=10364604