Filter Caching for Free: The Untapped Potential of the Store-Buffer

Modern processors contain store-buffers to allow stores to retire under a miss, thus hiding store-miss latency. The store-buffer needs to be large (for performance) and searched on every load (for correctness), thereby making it a costly structure in both area and energy. Yet on every load, the stor...

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Veröffentlicht in:	2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA) S. 436 - 448
Hauptverfasser:	Alves, Ricardo, Ros, Alberto, Black-Schaffer, David, Kaxiras, Stefanos
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	ACM 01.06.2019
Schlagworte:	energy efficient architecture filter-cache memory architecture single thread performance store-buffer
ISSN:	2575-713X
Online-Zugang:	Volltext
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