Software-Controlled Priority Characterization of POWER5 Processor

Due to the limitations of instruction-level parallelism, thread-level parallelism has become a popular way to improve processor performance. One example is the IBM POWER5TM processor, a two-context simultaneous-multithreaded dual-core chip. In each SMT core, the IBM POWER5 features two levels of thr...

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Vydáno v:	2008 International Symposium on Computer Architecture s. 415 - 426
Hlavní autoři:	Boneti, Carlos, Cazorla, Francisco J., Gioiosa, Roberto, Buyuktosunoglu, Alper, Cher, Chen-Yong, Valero, Mateo
Médium:	Konferenční příspěvek Publikace
Jazyk:	angličtina
Vydáno:	Washington, DC, USA IEEE Computer Society 01.06.2008 IEEE Institute of Electrical and Electronics Engineers (IEEE)
Edice:	ACM Conferences
Témata:	Application software Arquitectura de computadors Computer architecture Computer systems organization > Architectures > Distributed architectures > Grid computing Computer systems organization > Architectures > Parallel architectures Computer systems organization > Architectures > Parallel architectures > Multicore architectures Computer systems organization > Architectures > Serial architectures > Superscalar architectures Computer systems organization > Dependable and fault-tolerant systems and networks Computing methodologies > Modeling and simulation > Simulation types and techniques > Massively parallel and high-performance simulations General and reference > Cross-computing tools and techniques > Performance Hardware Hardware > Communication hardware, interfaces and storage IBM POWER5 Informàtica Instruction sets Linux Microprocessadors Microprocessor chips Microprocessors Multi-threading Networks > Network performance evaluation Parallel processing Parallel processing (Electronic computers) performance characterization Performance loss Processament en paral·lel (Ordinadors) Resource allocation simultaneous multithreading Simultaneous multithreading processors SMT Software and its engineering > Software organization and properties > Software system structures > Distributed systems organizing principles > Grid computing Software performance Software performance evaluation software-controlled prioritization Surface-mount technology Throughput Yarn Àrees temàtiques de la UPC performance characterization IBM POWER5 simultaneous multithreading SMT software-controlled prioritization
ISBN:	9780769531748, 0769531741
ISSN:	1063-6897
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