Boneti, C., Cazorla, F. J., Gioiosa, R., Buyuktosunoglu, A., Cher, C., & Valero, M. (2008, June). Software-Controlled Priority Characterization of POWER5 Processor. 2008 International Symposium on Computer Architecture, 415-426. https://doi.org/10.1109/ISCA.2008.8
Citace podle Chicago (17th ed.)Boneti, Carlos, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, a Mateo Valero. "Software-Controlled Priority Characterization of POWER5 Processor." 2008 International Symposium on Computer Architecture Jun. 2008: 415-426. https://doi.org/10.1109/ISCA.2008.8.
Citace podle MLA (9th ed.)Boneti, Carlos, et al. "Software-Controlled Priority Characterization of POWER5 Processor." 2008 International Symposium on Computer Architecture, Jun. 2008, pp. 415-426, https://doi.org/10.1109/ISCA.2008.8.