The state-of-the-art in semiconductor reverse engineering

This presentation gives an overview of the place of reverse engineering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. The continuous drive of Moore's law to increase the integration level of silicon chips has presented major chall...

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Bibliographic Details
Published in:2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC) pp. 333 - 338
Main Authors: Torrance, Randy, James, Dick
Format: Conference Proceeding
Language:English
Published: New York, NY, USA ACM 05.06.2011
IEEE
Series:ACM Conferences
Subjects:
Circuit extraction
Hacking
Hardware
IC Analysis
Integrated circuits
Patents Security
Reverse engineering
Scanning electron microscopy
Security and privacy > Cryptography > Cryptanalysis and other attacks
Security and privacy > Intrusion/anomaly detection and malware mitigation
Social and professional topics > Computing > technology policy > Computer crime
Social and professional topics > Computing > technology policy > Intellectual property > Patents
Software
Tamper Resistance
Transistors
tamper resistance
reverse engineering
hacking
patents security
IC analysis
circuit extraction
ISBN:1450306365, 9781450306362
ISSN:0738-100X
Online Access:Get full text
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Summary:This presentation gives an overview of the place of reverse engineering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. The continuous drive of Moore's law to increase the integration level of silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns, and demanding the adoption of new and more sophisticated technology to analyze chips. Hardware encryption embedded in chips adds a whole other level of difficulty to IC analysis, but does not necessarily keep the reverse engineer out. This paper discusses the techniques used for system-level analysis, both hardware and software; process analysis, looking at the materials and processes used to create the chip; and circuit extraction, taking the chip down to the transistor level, and working back up through the interconnects to create schematics.
ISBN:1450306365
9781450306362
ISSN:0738-100X
DOI:10.1145/2024724.2024805