Implementing sparse matrix-vector multiplication on throughput-oriented processors
Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations encounter a broad spectrum of matrices ranging from the regular to the highly irregular. Harnessing the tremendous potential...
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| Vydáno v: | Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis s. 1 - 11 |
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| Hlavní autoři: | , |
| Médium: | Konferenční příspěvek |
| Jazyk: | angličtina |
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New York, NY, USA
ACM
14.11.2009
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| Edice: | ACM Conferences |
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| ISBN: | 1605587443, 9781605587448 |
| ISSN: | 2167-4329 |
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| Abstract | Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations encounter a broad spectrum of matrices ranging from the regular to the highly irregular. Harnessing the tremendous potential of throughput-oriented processors for sparse operations requires that we expose substantial fine-grained parallelism and impose sufficient regularity on execution paths and memory access patterns. We explore SpMV methods that are well-suited to throughput-oriented architectures like the GPU and which exploit several common sparsity classes. The techniques we propose are efficient, successfully utilizing large percentages of peak bandwidth. Furthermore, they deliver excellent total throughput, averaging 16 GFLOP/s and 10 GFLOP/s in double precision for structured grid and unstructured mesh matrices, respectively, on a GeForce GTX 285. This is roughly 2.8 times the throughput previously achieved on Cell BE and more than 10 times that of a quad-core Intel Clovertown system. |
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| AbstractList | Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations encounter a broad spectrum of matrices ranging from the regular to the highly irregular. Harnessing the tremendous potential of throughput-oriented processors for sparse operations requires that we expose substantial fine-grained parallelism and impose sufficient regularity on execution paths and memory access patterns. We explore SpMV methods that are well-suited to throughput-oriented architectures like the GPU and which exploit several common sparsity classes. The techniques we propose are efficient, successfully utilizing large percentages of peak bandwidth. Furthermore, they deliver excellent total throughput, averaging 16 GFLOP/s and 10 GFLOP/s in double precision for structured grid and unstructured mesh matrices, respectively, on a GeForce GTX 285. This is roughly 2.8 times the throughput previously achieved on Cell BE and more than 10 times that of a quad-core Intel Clovertown system. |
| Author | Garland, Michael Bell, Nathan |
| Author_xml | – sequence: 1 givenname: Nathan surname: Bell fullname: Bell, Nathan organization: NVIDIA Research – sequence: 2 givenname: Michael surname: Garland fullname: Garland, Michael organization: NVIDIA Research |
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| SubjectTerms | Bandwidth Computer systems organization -- Architectures -- Parallel architectures -- Multiple instruction, multiple data Computer systems organization -- Dependable and fault-tolerant systems and networks Computing methodologies -- Symbolic and algebraic manipulation -- Symbolic and algebraic algorithms -- Linear algebra algorithms General and reference -- Cross-computing tools and techniques -- Performance Graphics processing units Hardware Instruction sets Kernel Mathematics of computing -- Mathematical analysis -- Numerical analysis -- Computations on matrices Memory management Networks -- Network performance evaluation Optimization Sparse matrices Throughput Vectors |
| Title | Implementing sparse matrix-vector multiplication on throughput-oriented processors |
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