A parallel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design
In this paper, we present a bottom-up clustering algorithm based on recursive collapsing of small cliques in a graph. The sizes of the small cliques are derived using random graph theory. This clustering algorithm leads to a natural parallel implementation in which multiple processors are used to id...
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| Published in: | 30th ACM/IEEE Design Automation Conference pp. 755 - 760 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
New York, NY, USA
ACM
01.07.1993
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| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 9780897915779, 0897915771 |
| ISSN: | 0738-100X |
| Online Access: | Get full text |
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