Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition
This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a techni...
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| Vydané v: | Design, Automation and Test in Europe s. 430 - 431 |
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| Hlavní autori: | , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
Washington, DC, USA
IEEE Computer Society
07.03.2005
IEEE |
| Edícia: | ACM Conferences |
| Predmet: | |
| ISBN: | 9780769522883, 0769522882 |
| ISSN: | 1530-1591 |
| On-line prístup: | Získať plný text |
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| Shrnutí: | This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit implementing f(X, Y) into a circuit implementing the decomposed representation h(g(X), Y). Preliminary experimental results indicate that the proposed approach has a significant potential. |
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| Bibliografia: | SourceType-Conference Papers & Proceedings-1 ObjectType-Conference Paper-1 content type line 25 |
| ISBN: | 9780769522883 0769522882 |
| ISSN: | 1530-1591 |
| DOI: | 10.1109/DATE.2005.83 |

