Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition
This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a techni...
Saved in:
| Published in: | Design, Automation and Test in Europe pp. 430 - 431 |
|---|---|
| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
Washington, DC, USA
IEEE Computer Society
07.03.2005
IEEE |
| Series: | ACM Conferences |
| Subjects: | |
| ISBN: | 9780769522883, 0769522882 |
| ISSN: | 1530-1591 |
| Online Access: | Get full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Abstract | This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit implementing f(X, Y) into a circuit implementing the decomposed representation h(g(X), Y). Preliminary experimental results indicate that the proposed approach has a significant potential. |
|---|---|
| AbstractList | This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit implementing f(X, Y) into a circuit implementing the decomposed representation h(g(X), Y). Preliminary experimental results indicate that the proposed approach has a significant potential. This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y)=h(g(X), Y) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit, implementing f(X, Y) into a circuit implementing the decomposed representation h(g(X), Y). Preliminary experimental results indicate that the proposed approach has significant potential. |
| Author | Dubrova, Elena Martinelli, Andres |
| Author_xml | – sequence: 1 givenname: Andres surname: Martinelli fullname: Martinelli, Andres organization: Royal Institute of Technology, IMIT/KTH, Sweden – sequence: 2 givenname: Elena surname: Dubrova fullname: Dubrova, Elena organization: Royal Institute of Technology, IMIT/KTH, Sweden |
| BackLink | https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-24442$$DView record from Swedish Publication Index (Kungliga Tekniska Högskolan) |
| BookMark | eNqNkb1v2zAQxQkkAeIm3rpl0dIuiRx-iuToWvkCAiSI3a4EKZ1iNrLoklIC__eV4aJzDjgc8N7v3vK-oOMudIDQV4JnhGB9Xc5XNzOKsZgpdoSmWiosCy0oVYodowkRDOdEaHKKpin9xuMwzUkhJ-j5Rxi6OltCP24LVe9Dl9lRWfhYDb7PXiBf7rp-DcmnrAkxm0ew1yW0dpeV0b9Dl5VQhc02JL9_PkcnjW0TTP_dM_Tz9ma1uM8fn-4eFvPH3DKs-1w45yTHDWGCEMJpLWlNQTZa1TUVdS0cd4Q3qqCukYprV2FdkEJVXMpKS8fO0NUhN33AdnBmG_3Gxp0J1pvS_5qbEF_NW782lHNOR_z7Ad_G8GeA1JuNTxW0re0gDMkwgoXigo_gxQH0APA_lTAthFaje3lwbbUxLoS3ZAg2-w7MvgOz78AoZlz00Iz0t8_Q7C8HtoVb |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL 7SC 8FD JQ2 L7M L~C L~D ADTPV BNKNJ D8V |
| DOI | 10.1109/DATE.2005.83 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present Computer and Information Systems Abstracts Technology Research Database ProQuest Computer Science Collection Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Academic Computer and Information Systems Abstracts Professional SwePub SwePub Conference SWEPUB Kungliga Tekniska Högskolan |
| DatabaseTitle | Computer and Information Systems Abstracts Technology Research Database Computer and Information Systems Abstracts – Academic Advanced Technologies Database with Aerospace ProQuest Computer Science Collection Computer and Information Systems Abstracts Professional |
| DatabaseTitleList | Computer and Information Systems Abstracts |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering Computer Science |
| EndPage | 431 |
| ExternalDocumentID | oai_DiVA_org_kth_24442 1395598 |
| Genre | orig-research Conference Paper |
| GroupedDBID | 6IE 6IF 6IK 6IL 6IN AAJGR AARBI ACM ADPZR ALMA_UNASSIGNED_HOLDINGS APO BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK GUFHI OCL RIB RIC RIE RIL 123 29F 29O 6IH AAWTH ABLEC ADZIZ CHZPO FEDTE IEGSK IPLJI KZ1 LMP M43 RNS 7SC 8FD JQ2 L7M L~C L~D ADTPV BNKNJ D8V LHSKQ |
| ID | FETCH-LOGICAL-a309t-5bbb740f13511142d72d2e7f98dd25dd5b4b14f862bf7849bc096168c477c97b3 |
| IEDL.DBID | RIE |
| ISBN | 9780769522883 0769522882 |
| ISICitedReferencesCount | 0 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000228086900079&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| ISSN | 1530-1591 |
| IngestDate | Tue Nov 04 16:56:12 EST 2025 Thu Jul 10 22:02:19 EDT 2025 Wed Aug 27 02:14:00 EDT 2025 Wed Jan 31 06:48:16 EST 2024 Wed Jan 31 06:38:23 EST 2024 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MeetingName | DATE05: Design, Automation and Test in Europe |
| MergedId | FETCHMERGED-LOGICAL-a309t-5bbb740f13511142d72d2e7f98dd25dd5b4b14f862bf7849bc096168c477c97b3 |
| Notes | SourceType-Conference Papers & Proceedings-1 ObjectType-Conference Paper-1 content type line 25 |
| PQID | 31058454 |
| PQPubID | 23500 |
| PageCount | 2 |
| ParticipantIDs | swepub_primary_oai_DiVA_org_kth_24442 acm_books_10_1109_DATE_2005_83 proquest_miscellaneous_31058454 acm_books_10_1109_DATE_2005_83_brief ieee_primary_1395598 |
| PublicationCentury | 2000 |
| PublicationDate | 20050307 20050000 2005 |
| PublicationDateYYYYMMDD | 2005-03-07 2005-01-01 |
| PublicationDate_xml | – month: 03 year: 2005 text: 20050307 day: 07 |
| PublicationDecade | 2000 |
| PublicationPlace | Washington, DC, USA |
| PublicationPlace_xml | – name: Washington, DC, USA |
| PublicationSeriesTitle | ACM Conferences |
| PublicationTitle | Design, Automation and Test in Europe |
| PublicationTitleAbbrev | DATE |
| PublicationYear | 2005 |
| Publisher | IEEE Computer Society IEEE |
| Publisher_xml | – name: IEEE Computer Society – name: IEEE |
| SSID | ssj0000394167 ssj0005329 |
| Score | 1.5762517 |
| Snippet | This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of... |
| SourceID | swepub proquest ieee acm |
| SourceType | Open Access Repository Aggregation Database Publisher |
| StartPage | 430 |
| SubjectTerms | Algorithm design and analysis Binary decision diagrams Boolean functions Circuit synthesis Computer science Computing methodologies -- Artificial intelligence -- Search methodologies -- Heuristic function construction Computing methodologies -- Symbolic and algebraic manipulation -- Symbolic and algebraic algorithms -- Algebraic algorithms Data structures Datavetenskap Delay Delay circuits Electric network analysis Electric variables control Hardware -- Electronic design automation -- Logic synthesis -- Circuit optimization Hardware -- Electronic design automation -- Physical design (EDA) -- Partitioning and floorplanning Hardware -- Hardware validation Heuristic methods Information technology Informationsteknik Input variables Logic circuits Problem solving Set theory TECHNOLOGY TEKNIKVETENSKAP |
| Title | Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition |
| URI | https://ieeexplore.ieee.org/document/1395598 https://www.proquest.com/docview/31058454 https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-24442 |
| WOSCitedRecordID | wos000228086900079&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1Nb9QwEB21FQe4FNoiQqH4UG6EzYezto-FtuKAqh5KVQkhy7HHIqrIoiSL1H_fsZMNRUJI3JIoUZS8OH4znnkP4FiiVLIymNYiZKuQOJzhuUxFZZfCe-PzuIJ__VlcXMibG3W5Be_mXhhEjMVn-D5sxrV8t7LrkCpbEFsJeuLbsC2EGHu15nxKVioem7o35R1ldCijAZ2lNGXnY8iuiG4Qp5yUdzb75VwRrxanJ1dnY6olKgka-2PyXfmTgj6UFY1T0fnu_z3EUzj43dPHLufZ6hlsYbsHuxtTBzaN8T148kChcB_0h2C7xHocWB8dcwhGZuiIbTq7bgbWYdrftcQi-6ZnRICZIRa6CNKTd8x14VfKHIa69ak4jH2NP1s6GCpHvh3Al_Ozq4-f0smTITVlpoa0qmtCNfPB2C-04TpRuAKFV9K5onKuqnmdc09xUu2F5Kq2wVNmKS0XwipRl89hp121-AIY2jovcek9MRqOyKXC3FL4WPnCmMzZBI7o7esQbPQ6xiqZ0gGeYJ1ZaVkmcPzvE3TdNegT2A8o6J-jfIeeAEjgzQZPTUMqrJOYFlfrXhPjJVpW8QTejjDPlwYt7tPm-kQTovp2-K6JHPHi5d9vcAiPo85rzNe8gp2hW-NreGR_DU3fHcWv9x5qH-eC |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1da9RAFL3UKlhfqm2l8aOdh_pm3HxMNpnHalsqrksf1lIQGebjDgYxK0lW6L_3ziS7VhDBtyQkhORkMufeufccgJMKK1EVCmNd-mwVEodTPK3isjDT0jnl0rCCfz0r5_Pq5kZcbcHrTS8MIobiM3zjN8Navl2alU-VTYiteD3xe3C_4DxLh26tTUYlyQUPbd3rAo88eJTRkE5imrTTIWgXRDiIVY7aO-v9fFMTLyZnp4vzIdkStASV-T46r_xJQu8Ki4bJ6GL3_x7jMRz87upjV5v56glsYbMHu2tbBzaO8j14dEejcB_kW2-8xDrsWRc8cwhIpuiIqVuzqnvWYtzdNsQju7pjRIGZIh468eKTt8y2_mfKLPrK9bE8jH0Ov1s66GtHvhzAp4vzxbvLeHRliFWeiD4utCZcE-et_Xwjri0zm2HpRGVtVlhbaK5T7ihS0q6suNDGu8pMK8PL0ohS509hu1k2eAgMjU5znDpHnIYj8kpgaiiALFymVGJNBEf09qUPNzoZopVESA-PN88sZJVHcPLvE6Rua3QR7HsU5I9BwEOOAERwvMZT0qDyKyWqweWqk8R5iZgVPIJXA8ybS70a91l9fSoJUfmt_yqJHvHs2d9vcAwPLxcfZ3L2fv7hOewE1deQvXkB2327wpfwwPzs6649Cl_yL55P6sk |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Design%2C+Automation+and+Test+in+Europe&rft.atitle=Bound+set+selection+and+circuit+re-synthesis+for+area%2Fdelay+driven+decomposition+%5Blogic+design%5D&rft.au=Martinelli%2C+A.&rft.au=Dubrova%2C+E.&rft.date=2005-01-01&rft.pub=IEEE&rft.isbn=9780769522883&rft.issn=1530-1591&rft.spage=430&rft.epage=431+Vol.+1&rft_id=info:doi/10.1109%2FDATE.2005.83&rft.externalDocID=1395598 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1530-1591&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1530-1591&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1530-1591&client=summon |

