Functional vector generation for HDL models using linear programming and 3-satisfiability

Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model describes interconnections of arithmetic, logic and memory modules. Given a path in the HDL model, the search for input stimuli that...

Full description

Saved in:

Bibliographic Details
Published in:	DAC 98: DAC: 35th Annual ACM/IEEE Design Automation Conference pp. 528 - 533
Main Authors:	Fallah, Farzan, Devadas, Srinivas, Keutzer, Kurt
Format:	Conference Proceeding
Language:	English
Published:	New York, NY, USA ACM 01.01.1998 IEEE
Series:	ACM Conferences
Subjects:	Applied computing > Physical sciences and engineering > Engineering Arithmetic Circuit simulation Equations Hardware > Electronic design automation > Hardware description languages and compilation Hardware > Robustness Hardware design languages Integrated circuit interconnections Linear programming Logic programming Mathematics of computing > Mathematical analysis > Mathematical optimization > Continuous optimization > Linear programming Mathematics of computing > Mathematical software Permission Theory of computation > Design and analysis of algorithms > Mathematical optimization > Continuous optimization > Linear programming Vectors synthesis codec design automatian level converters voltage scaling low power placement MPEG4 flip-flops
ISBN:	0897919645, 9780897919647
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Be the first to leave a comment!