Formal Verification of Restoring Dividers made Fast and Simple

The paper describes a formal verification method for hardware implementation of restoring divider circuits. The method is based on setting select signals to predefined constants to reduce the design to easily verifiable circuit components, followed by their verification using standard equivalence ch...

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Bibliographic Details

Published in:	2023 60th ACM/IEEE Design Automation Conference (DAC) pp. 1 - 6
Main Authors:	Dasari, Jiteshri, Ciesielski, Maciej
Format:	Conference Proceeding
Language:	English
Published:	IEEE 09.07.2023
Subjects:	Computer bugs Debugging Design automation Formal verification Hardware Reverse engineering
Online Access:	Get full text
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