Uint-Packing: Multiply Your DNN Accelerator Performance via Unsigned Integer DSP Packing

DSP blocks are undoubtedly efficient solutions for implementing multiply-accumulate (MAC) operations on FPGA. Since DSP resources are scarce in FPGA, the advanced solution is to pack parallel multiplication operations into a single DSP. However, available methods are based on signed-type multiplicat...

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Vydané v:	2023 60th ACM/IEEE Design Automation Conference (DAC) s. 1 - 6
Hlavní autori:	Zhang, Jingwei, Zhang, Meng, Cao, Xinye, Li, Guoqing
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 09.07.2023
Predmet:	Computational modeling Design automation Energy efficiency Parallel processing Proposals Table lookup Throughput
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