Maximizing CNN accelerator efficiency through resource partitioning

Convolutional neural networks (CNNs) are revolutionizing machine learning, but they present significant computational challenges. Recently, many FPGA-based accelerators have been proposed to improve the performance and efficiency of CNNs. Current approaches construct a single processor that computes...

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Bibliographic Details

Published in:	2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) pp. 535 - 547
Main Authors:	Yongming Shen, Ferdman, Michael, Milder, Peter
Format:	Conference Proceeding
Language:	English
Published:	ACM 01.06.2017
Subjects:	Accelerator Arrays Convolutional codes Convolutional Neural Network Design methodology Field programmable gate arrays FPGA Hardware Throughput
Online Access:	Get full text
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