APA (7th ed.) Citation

Touloupas, K., Chouridis, N., & Sotiriadis, P. P. (2021, December 5). Local Bayesian Optimization For Analog Circuit Sizing. 2021 58th ACM/IEEE Design Automation Conference (DAC), 1237-1242. https://doi.org/10.1109/DAC18074.2021.9586172

Chicago Style (17th ed.) Citation

Touloupas, Konstantinos, Nikos Chouridis, and Paul P. Sotiriadis. "Local Bayesian Optimization For Analog Circuit Sizing." 2021 58th ACM/IEEE Design Automation Conference (DAC) 5 Dec. 2021: 1237-1242. https://doi.org/10.1109/DAC18074.2021.9586172.

MLA (9th ed.) Citation

Touloupas, Konstantinos, et al. "Local Bayesian Optimization For Analog Circuit Sizing." 2021 58th ACM/IEEE Design Automation Conference (DAC), 5 Dec. 2021, pp. 1237-1242, https://doi.org/10.1109/DAC18074.2021.9586172.