PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learning

In this work, we present a reinforcement learning (RL) based approach to designing parallel prefix circuits such as adders or priority encoders that are fundamental to high-performance digital design. Unlike prior methods, our approach designs solutions tabula rasa purely through learning with synth...

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Veröffentlicht in:	2021 58th ACM/IEEE Design Automation Conference (DAC) S. 853 - 858
Hauptverfasser:	Roy, Rajarshi, Raiman, Jonathan, Kant, Neel, Elkin, Ilyas, Kirby, Robert, Siu, Michael, Oberman, Stuart, Godil, Saad, Catanzaro, Bryan
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 05.12.2021
Schlagworte:	datapath optimization Delays Libraries machine learning Machine learning algorithms Reinforcement learning Task analysis Training
Online-Zugang:	Volltext
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