Fan, H., Ferianc, M., Rodrigues, M., Zhou, H., Niu, X., & Luk, W. (2021, December 5). High-Performance FPGA-based Accelerator for Bayesian Neural Networks. 2021 58th ACM/IEEE Design Automation Conference (DAC), 1063-1068. https://doi.org/10.1109/DAC18074.2021.9586137
Citace podle Chicago (17th ed.)Fan, Hongxiang, Martin Ferianc, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, a Wayne Luk. "High-Performance FPGA-based Accelerator for Bayesian Neural Networks." 2021 58th ACM/IEEE Design Automation Conference (DAC) 5 Dec. 2021: 1063-1068. https://doi.org/10.1109/DAC18074.2021.9586137.
Citace podle MLA (9th ed.)Fan, Hongxiang, et al. "High-Performance FPGA-based Accelerator for Bayesian Neural Networks." 2021 58th ACM/IEEE Design Automation Conference (DAC), 5 Dec. 2021, pp. 1063-1068, https://doi.org/10.1109/DAC18074.2021.9586137.