NAAS: Neural Accelerator Architecture Search

Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus on sizing the numerical architectural hyper-parameters while neglect searching the PE connectivities and compiler mappings. To tackle this ch...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:2021 58th ACM/IEEE Design Automation Conference (DAC) s. 1051 - 1056
Hlavní autoři: Lin, Yujun, Yang, Mengtian, Han, Song
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 05.12.2021
Témata:
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Abstract Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus on sizing the numerical architectural hyper-parameters while neglect searching the PE connectivities and compiler mappings. To tackle this challenge, we propose Neural Accelerator Architecture Search (NAAS) that holistically searches the neural network architecture, accelerator architecture and compiler mapping in one optimization loop. NAAS composes highly matched architectures together with efficient mapping. As a data-driven approach, NAAS rivals the human design Eyeriss by 4.4 \times EDP reduction with 2.7% accuracy improvement on ImageNet under the same computation resource, and offers 1.4 \times to 3.5 \times EDP reduction than only sizing the architectural hyper-parameters.
AbstractList Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus on sizing the numerical architectural hyper-parameters while neglect searching the PE connectivities and compiler mappings. To tackle this challenge, we propose Neural Accelerator Architecture Search (NAAS) that holistically searches the neural network architecture, accelerator architecture and compiler mapping in one optimization loop. NAAS composes highly matched architectures together with efficient mapping. As a data-driven approach, NAAS rivals the human design Eyeriss by 4.4 \times EDP reduction with 2.7% accuracy improvement on ImageNet under the same computation resource, and offers 1.4 \times to 3.5 \times EDP reduction than only sizing the architectural hyper-parameters.
Author Han, Song
Lin, Yujun
Yang, Mengtian
Author_xml – sequence: 1
  givenname: Yujun
  surname: Lin
  fullname: Lin, Yujun
  organization: MIT
– sequence: 2
  givenname: Mengtian
  surname: Yang
  fullname: Yang, Mengtian
  organization: SJTU
– sequence: 3
  givenname: Song
  surname: Han
  fullname: Han, Song
  organization: MIT
BookMark eNotj91Kw0AUhFdQUGueQIQ8gI3n7M_ZXe-WWH-g1IvqddlsTjAQW9mkF769AXszw_ANA3MtzveHPQtxh1Ahgn94CjU6sLqSILHyxpE0cCYKbx0SGa2k1XApinHsGyAwTs96Je43IWwfyw0fcxzKkBIPnON0yGXI6aufOE3HzOWW4xxvxEUXh5GLky_E5_Pqo35drt9f3uqwXkbp7LS0kjpuAI1PpLxTiXzqmKLUhJpt2-oG2JBUNsKMnJs7SiPaDlTrNKuFuP3f7Zl595P775h_d6dP6g_YCEHE
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/DAC18074.2021.9586250
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Xplore
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
EISBN 9781665432740
1665432748
EndPage 1056
ExternalDocumentID 9586250
Genre orig-research
GroupedDBID 6IE
6IH
ACM
ALMA_UNASSIGNED_HOLDINGS
CBEJK
RIE
RIO
ID FETCH-LOGICAL-a287t-726feb0159c63983c69cfe6a24614e7dd4b0e56237a069c8898334117f03d84e3
IEDL.DBID RIE
ISICitedReferencesCount 41
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000766079700176&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Wed Aug 27 01:41:41 EDT 2025
IsDoiOpenAccess false
IsOpenAccess true
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-a287t-726feb0159c63983c69cfe6a24614e7dd4b0e56237a069c8898334117f03d84e3
PageCount 6
ParticipantIDs ieee_primary_9586250
PublicationCentury 2000
PublicationDate 2021-Dec.-5
PublicationDateYYYYMMDD 2021-12-05
PublicationDate_xml – month: 12
  year: 2021
  text: 2021-Dec.-5
  day: 05
PublicationDecade 2020
PublicationTitle 2021 58th ACM/IEEE Design Automation Conference (DAC)
PublicationTitleAbbrev DAC
PublicationYear 2021
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssib060584060
Score 2.466967
Snippet Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus...
SourceID ieee
SourceType Publisher
StartPage 1051
SubjectTerms Accelerator architectures
Costs
Design automation
Neural networks
Optimization
Productivity
Space exploration
Title NAAS: Neural Accelerator Architecture Search
URI https://ieeexplore.ieee.org/document/9586250
WOSCitedRecordID wos000766079700176&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5q8eBJpRXf7MFj02Z3k03ibakWD7IUVOitJNlZEGQrdevvb5Jdq4IXbyEPwiSBbyYz3wzAjXAqPdrEEs0zTZjlnEhpORGMCV1xoUUZiMKPoijkYqHmPRjtuDCIGILPcOybwZdfruzGf5VNFHf6tzfQ94TIWq7W19vx3j2HTbQj6cRUTe7yaexTvTgjMInH3dpfRVQChswO_7f7EQy_yXjRfAczx9DDegCjIs-fbiOfWkO_Rbm1Dj2CwzzKf3gGojaYeAgvs_vn6QPpCh8Q7QyYhogkq9A4oFbWKRAytZmyFWba535jKMqSGYpecRGauiEp3RyHRrGoaFpKhukJ9OtVjacQGaUMq5zdgtQwTiuD0nCDipapj5jWZzDwki7f29wWy07I87-7L-DAH2YI5-CX0G_WG7yCffvZvH6sr8OFbAH8RIpo
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5KFfSk0opv9-CxabPdZJN4W6qlYl0KVuitJNlZEKQttfX3m6RrVfDiLeRByAO--TLzTQBuhDPp0XYt0TzVhFnOiZSWE8GY0CUXWhRBKDwUeS4nEzWqQWurhUHEEHyGbV8Mvvxibtf-qayjuLO_PUHf4czxno1a6-v2eP-eQydayXRiqjp3WS_2yV4cDezG7Wr0r29UAor0D_43_yE0v-V40WgLNEdQw1kDWnmWPd9GPrmGfosyax1-BJd5lP3wDUSbcOImvPTvx70Bqb4-INpRmBUR3bRE46BaWWdCyMSmypaYap_9jaEoCmYoetNFaOqapHR9HB7FoqRJIRkmx1CfzWd4ApFRyrDSMRekhnFaGpSGG1S0SHzMtD6Fhl_pdLHJbjGtFnn2d_U17A3GT8Pp8CF_PId9v7EhuINfQH21XOMl7NqP1ev78ioczidlsY2v
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2021+58th+ACM%2FIEEE+Design+Automation+Conference+%28DAC%29&rft.atitle=NAAS%3A+Neural+Accelerator+Architecture+Search&rft.au=Lin%2C+Yujun&rft.au=Yang%2C+Mengtian&rft.au=Han%2C+Song&rft.date=2021-12-05&rft.pub=IEEE&rft.spage=1051&rft.epage=1056&rft_id=info:doi/10.1109%2FDAC18074.2021.9586250&rft.externalDocID=9586250