Parallelizing Maximal Clique Enumeration on GPUs

We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the numb...

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Published in:2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) pp. 162 - 175
Main Authors: Almasri, Mohammad, Chang, Yen-Hsiang, Hajj, Izzat El, Nagi, Rakesh, Xiong, Jinjun, Hwu, Wen-mei
Format: Conference Proceeding
Language:English
Published: IEEE 21.10.2023
Subjects:
Codes
Explosions
Graphics processing units
Instruction sets
Load management
Memory management
Scalability
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Abstract We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the number of tree nodes at deep levels. We propose to parallelize MCE on GPUs by performing depth-first traversal of independent subtrees in parallel. Since MCE suffers from high load imbalance and memory capacity requirements, we propose a worker list for dynamic load balancing, as well as partial induced subgraphs and a compact representation of excluded vertex sets to regulate memory consumption. Our evaluation shows that our GPU implementation on a single GPU outperforms the state-of-the-art parallel CPU implementation by a geometric mean of 4.9× (up to 16.7×), and scales efficiently to multiple GPUs. Our code has been open-sourced to enable further research on accelerating MCE.
AbstractList We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the number of tree nodes at deep levels. We propose to parallelize MCE on GPUs by performing depth-first traversal of independent subtrees in parallel. Since MCE suffers from high load imbalance and memory capacity requirements, we propose a worker list for dynamic load balancing, as well as partial induced subgraphs and a compact representation of excluded vertex sets to regulate memory consumption. Our evaluation shows that our GPU implementation on a single GPU outperforms the state-of-the-art parallel CPU implementation by a geometric mean of 4.9× (up to 16.7×), and scales efficiently to multiple GPUs. Our code has been open-sourced to enable further research on accelerating MCE.
Author Nagi, Rakesh
Hwu, Wen-mei
Chang, Yen-Hsiang
Xiong, Jinjun
Hajj, Izzat El
Almasri, Mohammad
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  givenname: Yen-Hsiang
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  givenname: Rakesh
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  givenname: Wen-mei
  surname: Hwu
  fullname: Hwu, Wen-mei
  email: w-hwu@illinois.edu
  organization: Nvidia Corporation,Santa Clara,CA,USA
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Snippet We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works...
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SubjectTerms Codes
Explosions
Graphics processing units
Instruction sets
Load management
Memory management
Scalability
Title Parallelizing Maximal Clique Enumeration on GPUs
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