Parallelizing Maximal Clique Enumeration on GPUs
We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the numb...
Gespeichert in:
| Veröffentlicht in: | 2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) S. 162 - 175 |
|---|---|
| Hauptverfasser: | , , , , , |
| Format: | Tagungsbericht |
| Sprache: | Englisch |
| Veröffentlicht: |
IEEE
21.10.2023
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Abstract | We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the number of tree nodes at deep levels. We propose to parallelize MCE on GPUs by performing depth-first traversal of independent subtrees in parallel. Since MCE suffers from high load imbalance and memory capacity requirements, we propose a worker list for dynamic load balancing, as well as partial induced subgraphs and a compact representation of excluded vertex sets to regulate memory consumption. Our evaluation shows that our GPU implementation on a single GPU outperforms the state-of-the-art parallel CPU implementation by a geometric mean of 4.9× (up to 16.7×), and scales efficiently to multiple GPUs. Our code has been open-sourced to enable further research on accelerating MCE. |
|---|---|
| AbstractList | We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works on parallelizing MCE on GPUs perform a breadth-first traversal of the tree, which has limited scalability because of the explosion in the number of tree nodes at deep levels. We propose to parallelize MCE on GPUs by performing depth-first traversal of independent subtrees in parallel. Since MCE suffers from high load imbalance and memory capacity requirements, we propose a worker list for dynamic load balancing, as well as partial induced subgraphs and a compact representation of excluded vertex sets to regulate memory consumption. Our evaluation shows that our GPU implementation on a single GPU outperforms the state-of-the-art parallel CPU implementation by a geometric mean of 4.9× (up to 16.7×), and scales efficiently to multiple GPUs. Our code has been open-sourced to enable further research on accelerating MCE. |
| Author | Nagi, Rakesh Hwu, Wen-mei Chang, Yen-Hsiang Xiong, Jinjun Hajj, Izzat El Almasri, Mohammad |
| Author_xml | – sequence: 1 givenname: Mohammad surname: Almasri fullname: Almasri, Mohammad email: almasri3@illinois.edu organization: University of Illinois at Urbana-Champaign,ECE,Urbana,IL,USA – sequence: 2 givenname: Yen-Hsiang surname: Chang fullname: Chang, Yen-Hsiang email: yhchang3@illinois.edu organization: University of Illinois at Urbana-Champaign,ECE,Urbana,IL,USA – sequence: 3 givenname: Izzat El surname: Hajj fullname: Hajj, Izzat El email: izzat.elhajj@aub.edu.lb organization: American University of Beirut,Department of Computer Science,Beirut,Lebanon – sequence: 4 givenname: Rakesh surname: Nagi fullname: Nagi, Rakesh email: nagi@illinois.edu organization: University of Illinois at Urbana-Champaign,ISE,Urbana,IL,USA – sequence: 5 givenname: Jinjun surname: Xiong fullname: Xiong, Jinjun email: jinjun@buffalo.edu organization: University at Buffalo,Department of Computer Science and Engineering,Buffalo,NY,USA – sequence: 6 givenname: Wen-mei surname: Hwu fullname: Hwu, Wen-mei email: w-hwu@illinois.edu organization: Nvidia Corporation,Santa Clara,CA,USA |
| BookMark | eNotjstKw0AUQEdQUGv-oIv8QOKdO8-7LKFWoWIW7bpM5yED01STFtSvt6Bw4OwO555dD8chMjbn0HIO9Ngvuo2ynJsWAUULAIhXrCJDVigQEpUUt6yaprwHZYwwSOKOQe9GV0os-ScP7_Wr-8oHV-qu5M9zrJfD-RBHd8rHob6w6rfTA7tJrkyx-veMbZ-Wm-65Wb-tXrrFunFo9alxhgIpbcmokLwMShMA9yA8eRmTD1FLb5WTBpXmmKL3qJIMluyeMJCYsflfN8cYdx_jZWv83nEQWiqjxS_sRUTj |
| CODEN | IEEPAD |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/PACT58117.2023.00022 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EISBN | 9798350342543 |
| EndPage | 175 |
| ExternalDocumentID | 10364576 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL ACM ALMA_UNASSIGNED_HOLDINGS APO CBEJK LHSKQ RIE RIL |
| ID | FETCH-LOGICAL-a286t-a79d9568975dfc4d569001c03c9c4efcde64c85a4725612fecc25f4d898b92d93 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 4 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=001165646800014&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Wed Aug 27 02:24:17 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-a286t-a79d9568975dfc4d569001c03c9c4efcde64c85a4725612fecc25f4d898b92d93 |
| PageCount | 14 |
| ParticipantIDs | ieee_primary_10364576 |
| PublicationCentury | 2000 |
| PublicationDate | 2023-Oct.-21 |
| PublicationDateYYYYMMDD | 2023-10-21 |
| PublicationDate_xml | – month: 10 year: 2023 text: 2023-Oct.-21 day: 21 |
| PublicationDecade | 2020 |
| PublicationTitle | 2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) |
| PublicationTitleAbbrev | PACT |
| PublicationYear | 2023 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssib057737293 |
| Score | 2.2704663 |
| Snippet | We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 162 |
| SubjectTerms | Codes Explosions Graphics processing units Instruction sets Load management Memory management Scalability |
| Title | Parallelizing Maximal Clique Enumeration on GPUs |
| URI | https://ieeexplore.ieee.org/document/10364576 |
| WOSCitedRecordID | wos001165646800014&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5s8eBJxRXf7MHrrtlsstkcpbR6seyhhd5KNpmFQt1KHyL-ejNpq3jwIAQScgkzk2QySb75AO6zmjMrlEkEhqsbH7AazptEM-lrVFlj60A2oYbDcjLR1Q6sHrAwiBg-n2FKzfCW7xZ2Q1dlfoXTo5kqOtBRSm3BWvvJIxURruh8B4_LmH6oHnsjSUDKlDjC05Dr5ReJSvAhg-N_jn4C0Q8aL66-_cwpHGB7BqwyS6JBmc8-fWf8Yj5mr2Ye9-aUjzXutwSrDEqPfXmqxqsIxoP-qPec7NgPvLLKYp0YpR1h-bSSrrHCSR_Hssyy3GorsLEOC2FLaYTixHDZeFtw2QhX6rLW3On8HLrtosULiFmBIfG784c34VecdqKUNRYMfTiRm_wSIhJ3-rZNcDHdS3r1R_81HJFGaQvn2Q1018sN3sKhfV_PVsu7YJYvHB2MRA |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB60CnpSseLbPXjdms0mm81RSmvFdtnDFnor2WQWCnUrfYj4603SVvHgQQgk5BJmJslkknzzAdxHJSWaCRUy9Fc3NmBVlFahJNzWKKJKl55sQmRZOhrJfANW91gYRPSfz7Dlmv4t38z0yl2V2RXuHs1Esgt7nDEareFa2-nDhaNckfEGIBcR-ZA_tgvuoJQtxxLe8tleftGoeC_SPfrn-MfQ_MHjBfm3pzmBHaxPgeRq7ohQppNP2xkM1MfkVU2D9tRlZA06tQNWerUHtjzlw0UTht1O0e6FG_4Dq640WYZKSOPQfFJwU2lmuI1kSaRJrKVmWGmDCdMpV0xQx3FZWWtQXjGTyrSU1Mj4DBr1rMZzCEiCPvW7scc3ZtecNCzlJSYEbUARq_gCmk7c8ds6xcV4K-nlH_13cNArBv1x_zl7uYJDp123odPoGhrL-QpvYF-_LyeL-a030Redu4-L |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2023+32nd+International+Conference+on+Parallel+Architectures+and+Compilation+Techniques+%28PACT%29&rft.atitle=Parallelizing+Maximal+Clique+Enumeration+on+GPUs&rft.au=Almasri%2C+Mohammad&rft.au=Chang%2C+Yen-Hsiang&rft.au=Hajj%2C+Izzat+El&rft.au=Nagi%2C+Rakesh&rft.date=2023-10-21&rft.pub=IEEE&rft.spage=162&rft.epage=175&rft_id=info:doi/10.1109%2FPACT58117.2023.00022&rft.externalDocID=10364576 |