InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing

Sparse matrix multiplication is one of the key computational kernels in large-scale data analytics. However, a naive implementation suffers from the overheads of irregular memory accesses due to the representation of sparsity. To mitigate the memory access overheads, recent accelerator designs advoc...

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Vydané v:	2021 30th International Conference on Parallel Architectures and Compilation Techniques (PACT) s. 116 - 128
Hlavní autori:	Baek, Daehyeon, Hwang, Soojin, Heo, Taekyung, Kim, Daehoon, Huh, Jaehyuk
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 01.09.2021
Predmet:	hardware accelerator inner product Memory management Merging Parallel processing Product design Production Simulation sparse matrix multiplication System-on-chip
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