Multi-level load balancing with an integrated runtime approach

The recent trend of increasing numbers of cores per chip has resulted in vast amounts of on-node parallelism. These high core counts result in hardware variability that introduces imbalance. Applications are also becoming more complex, resulting in dynamic load imbalance. Load imbalance of any kind...

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Bibliographic Details
Published in:2018 18th IEEE ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID) pp. 31 - 40
Main Authors: Bak, Seonmyeong, Menon, Harshitha, White, Sam, Diener, Matthias, Kale, Laxmikant
Format: Conference Proceeding
Language:English
Published: Piscataway, NJ, USA IEEE Press 01.05.2018
IEEE
Series:ACM Conferences
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ISBN:1538658151, 9781538658154
Online Access:Get full text
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