Kastensmidt, F. L., Sterpone, L., Carro, L., & Reorda, M. S. (2005, March 7). On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs. Design, Automation and Test in Europe, 1290-1295. https://doi.org/10.1109/DATE.2005.229
Chicago Style (17th ed.) CitationKastensmidt, F. Lima, L. Sterpone, L. Carro, and M. Sonza Reorda. "On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs." Design, Automation and Test in Europe 7 Mar. 2005: 1290-1295. https://doi.org/10.1109/DATE.2005.229.
MLA (9th ed.) CitationKastensmidt, F. Lima, et al. "On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs." Design, Automation and Test in Europe, 7 Mar. 2005, pp. 1290-1295, https://doi.org/10.1109/DATE.2005.229.