Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in "trusted" software that they execute. Security attacks exploit these vulnerabilities to trigger unintended program behavior, such as the l...
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| Published in: | Design, Automation and Test in Europe pp. 178 - 183 |
|---|---|
| Main Authors: | , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
Washington, DC, USA
IEEE Computer Society
07.03.2005
IEEE |
| Series: | ACM Conferences |
| Subjects: |
Software and its engineering
> Software creation and management
> Software development process management
Software and its engineering
> Software creation and management
> Software verification and validation
> Formal software verification
|
| ISBN: | 9780769522883, 0769522882 |
| ISSN: | 1530-1591 |
| Online Access: | Get full text |
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| Abstract | Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in "trusted" software that they execute. Security attacks exploit these vulnerabilities to trigger unintended program behavior, such as the leakage of sensitive data or the execution of malicious code. In this work, we present a hardware-assisted paradigm to enhance embedded system security by detecting and preventing unintended program behavior. Specifically, we extract properties of an embedded program through static program analysis, and use them as the bases for enforcing permissible program behavior in real-time as the program executes. We present an architecture for hardware-assisted run-time monitoring, wherein the embedded processor is augmented with a hardware monitor that observes the processor's dynamic execution trace, checks whether the execution trace falls within the allowed program behavior, and flags any deviations from the expected behavior to trigger appropriate response mechanisms. We present properties that can be used to capture permissible program behavior at different levels of granularity within a program, namely inter-procedural control flow, intra-procedural control flow, and instruction stream integrity. We also present a systematic methodology to design application-specific hardware monitors for any given embedded program. We have evaluated the hardware requirements and performance of the proposed architecture for several embedded software benchmarks. Hardware implementations using a commercial design flow, and architectural simulations using the SimpleScalar framework, indicate that the proposed technique can thwart several common software and physical attacks, facilitating secure program execution with minimal overheads. |
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| AbstractList | Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in 'trusted'software that they execute. Security attacks exploit these vulnerabilities to trigger unintended program behavior, such as the leakage of sensitive data or the execution of malicious code. In this work, we present a hardware-assisted paradigm to enhance embedded system security by detecting and preventing unintended program behavior. Specifically, we extract properties of an embedded program through static program analysis, and use them as the bases for enforcing permissible program behavior in real-time as the program executes. We present an architecture for hardware-assisted run-time monitoring, wherein the embedded processor is augmented with a hardware monitor that observes the processor's dynamic execution trace, checks whether the execution trace falls within the allowed program behavior, and flags any deviations from the expected behavior to trigger appropriate response mechanisms. We present properties that can be used to capture permissible program behavior at different levels of granularity within a program, namely inter-procedural control flow, intra-procedural control flow, and instruction stream integrity. We also present a systematic methodology to design application-specific hardware monitors for any given embedded program. We have evaluated the hardware requirements and performance of the proposed architecture for several embedded software benchmarks. Hardware implementations using a commercial design flow, and architectural simulations using the SimpleScalar framework, indicate that the proposed technique can thwart several common software and physical attacks, facilitating secure program execution with minimal overheads. |
| Author | Jha, Niraj K. Raghunathan, Anand Arora, Divya Ravi, Srivaths |
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| SubjectTerms | Communication system security Computer architecture Computer systems organization -- Embedded and cyber-physical systems Computer systems organization -- Real-time systems Data security Embedded software Embedded system General and reference -- Cross-computing tools and techniques -- Verification Hardware Hardware -- Hardware validation Information security Mathematics of computing -- Discrete mathematics -- Graph theory -- Graph algorithms Monitoring National electric code Runtime Software and its engineering -- Software creation and management -- Software development process management Software and its engineering -- Software creation and management -- Software verification and validation -- Formal software verification Software and its engineering -- Software organization and properties -- Software functional properties -- Formal methods -- Software verification Theory of computation -- Semantics and reasoning -- Program reasoning -- Program analysis Theory of computation -- Semantics and reasoning -- Program reasoning -- Program verification Theory of computation -- Semantics and reasoning -- Program semantics |
| Title | Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring |
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