Synthesis of custom processors based on extensible platforms

Efficiency and flexibility are critical, but often conflicting, design goals in embedded system design. The recent emergence of extensible processors promises a favorable tradeoff between efficiency and flexibility, while keeping design turnaround times short. Current extensible processor design flo...

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Bibliographic Details
Published in:Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design pp. 641 - 648
Main Authors: Sun, Fei, Ravi, Srivaths, Raghunathan, Anand, Jha, Niraj K.
Format: Conference Proceeding
Language:English
Published: New York, NY, USA ACM 10.11.2002
IEEE
Series:ACM Conferences
Subjects:
Applied sciences
Computer systems organization > Embedded and cyber-physical systems
Computer systems organization > Real-time systems
Computing methodologies > Computer graphics
Computing methodologies > Distributed computing methodologies > Distributed programming languages
Computing methodologies > Symbolic and algebraic manipulation > Symbolic and algebraic algorithms
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Software and its engineering > Software notations and tools > Context specific languages > Domain specific languages
Theory of computation > Design and analysis of algorithms
Performance evaluation
Boarded computer
State of the art
Computer hardware
Processor
Circuit design
Integrated circuit
System design
Cost function
Flexibility
Computer aided design
ISBN:0780376072, 9780780376076
ISSN:1092-3152
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Summary:Efficiency and flexibility are critical, but often conflicting, design goals in embedded system design. The recent emergence of extensible processors promises a favorable tradeoff between efficiency and flexibility, while keeping design turnaround times short. Current extensible processor design flows automate several tedious tasks, but typically require designers to manually select the parts of the program that are to be implemented as custom instructions.In this work, we describe an automatic methodology to select custom instructions to augment an extensible processor, in order to maximize its efficiency for a given application program. We demonstrate that the number of custom instruction candidates grows rapidly with program size, leading to a large design space, and that the quality (speedup) of custom instructions varies significantly across this space, motivating the need for the proposed flow. Our methodology features cost functions to guide the custom instruction selection process, as well as static and dynamic pruning techniques to eliminate inferior parts of the design space from consideration. Further, we employ a two-stage process, wherein a limited number of promising instruction candidates are first selected, and then evaluated in more detail through cycle-accurate instruction set simulation and synthesis of the corresponding hardware, to identify the custom instruction combinations that result in the highest program speedup or maximize speedup under a given area constraint.We have evaluated the proposed techniques using a state-of-the-art extensible processor platform, in the context of a commercial design flow. Experiments with several benchmark programs indicate that custom processors synthesized using automatic custom instruction selection can result in large improvements in performance (upto 5.4X, average of 3.4X), energy (upto 4.5X, average of 3.2X), and energy-delay product (upto 24.2X, average of 12.6X), while speeding up the design process significantly.
Bibliography:SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
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ISBN:0780376072
9780780376076
ISSN:1092-3152
DOI:10.1145/774572.774667