Fast packet classification using bloom filters

Ternary Content Addressable Memory (TCAM), although widely used for general packet classification, is an expensive and high power-consuming device. Algorithmic solutions which rely on commodity memory chips are relatively inexpensive and power-efficient but have not been able to match the generality...

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Bibliographic Details
Published in:ANCS 2006 : proceedings of the 2006 ACM/IEEE Symposium on Architectures for Networking and Communications Systems : December 3-5, 2006, San Jose, California, USA pp. 61 - 70
Main Authors: Dharmapurikar, Sarang, Song, Haoyu, Turner, Jonathan, Lockwood, John
Format: Conference Proceeding
Language:English
Published: New York, NY, USA ACM 03.12.2006
IEEE
Series:ACM Conferences
Subjects:
Classification algorithms
Filtering algorithms
IP networks
Matched filters
Memory management
Networks > Network components > Intermediate nodes > Routers
packet classification
Partitioning algorithms
Probes
TCAM
TCAM
packet classification
ISBN:9781595935809, 1595935800
Online Access:Get full text
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Summary:Ternary Content Addressable Memory (TCAM), although widely used for general packet classification, is an expensive and high power-consuming device. Algorithmic solutions which rely on commodity memory chips are relatively inexpensive and power-efficient but have not been able to match the generality and performance of TCAMs. Therefore, the development of fast and power-efficient algorithmic packet classification techniques continues to be a research subject.In this paper we propose a new approach to packet classification which combines architectural and algorithmic techniques. Our starting point is the well-known crossproduct algorithm which is fast but has significant memory overhead due to the extra rules needed to represent the crossproducts. We show how to modify the crossproduct method in a way that drastically reduces the memory requirement without compromising on performance. Unnecessary accesses to the off-chip memory are avoided by filtering them through on-chip Bloom filters. For packets that match p rules in a rule set, our algorithm requires just 4 + p + ε independent memory accesses to return all matching rules, where ε << 1 is a small constant that depends on the false positive rate of the Bloom filters. Using two commodity SRAM chips, a throughput of 38 Million packets per second can be achieved. For rule set sizes ranging from a few hundred to several thousand filters, the average rule set expansion factor attributable to the algorithm is just 1.2 to 1.4. The average memory consumption per rule is 32 to 45 bytes.
Bibliography:SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
ISBN:9781595935809
1595935800
DOI:10.1145/1185347.1185356